Char/Misc and other driver subsystem changes for 6.3-rc1
Here is the large set of driver changes for char/misc drivers and other
smaller driver subsystems that flow through this git tree.
Included in here are:
- New IIO drivers and features and improvments in that subsystem
- New hwtracing drivers and additions to that subsystem
- lots of interconnect changes and new drivers as that subsystem seems
under very active development recently. This required also merging
in the icc subsystem changes through this tree.
- FPGA driver updates
- counter subsystem and driver updates
- MHI driver updates
- nvmem driver updates
- documentation updates
- Other smaller driver updates and fixes, full details in the shortlog
All of these have been in linux-next for a while with no reported
problems.
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Merge tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc
Pull char/misc and other driver subsystem updates from Greg KH:
"Here is the large set of driver changes for char/misc drivers and
other smaller driver subsystems that flow through this git tree.
Included in here are:
- New IIO drivers and features and improvments in that subsystem
- New hwtracing drivers and additions to that subsystem
- lots of interconnect changes and new drivers as that subsystem
seems under very active development recently. This required also
merging in the icc subsystem changes through this tree.
- FPGA driver updates
- counter subsystem and driver updates
- MHI driver updates
- nvmem driver updates
- documentation updates
- Other smaller driver updates and fixes, full details in the
shortlog
All of these have been in linux-next for a while with no reported
problems"
* tag 'char-misc-6.3-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc: (223 commits)
scripts/tags.sh: fix incompatibility with PCRE2
firmware: coreboot: Remove GOOGLE_COREBOOT_TABLE_ACPI/OF Kconfig entries
mei: lower the log level for non-fatal failed messages
mei: bus: disallow driver match while dismantling device
misc: vmw_balloon: fix memory leak with using debugfs_lookup()
nvmem: stm32: fix OPTEE dependency
dt-bindings: nvmem: qfprom: add IPQ8074 compatible
nvmem: qcom-spmi-sdam: register at device init time
nvmem: rave-sp-eeprm: fix kernel-doc bad line warning
nvmem: stm32: detect bsec pta presence for STM32MP15x
nvmem: stm32: add OP-TEE support for STM32MP13x
nvmem: core: use nvmem_add_one_cell() in nvmem_add_cells_from_of()
nvmem: core: add nvmem_add_one_cell()
nvmem: core: drop the removal of the cells in nvmem_add_cells()
nvmem: core: move struct nvmem_cell_info to nvmem-provider.h
nvmem: core: add an index parameter to the cell
of: property: add #nvmem-cell-cells property
of: property: make #.*-cells optional for simple props
of: base: add of_parse_phandle_with_optional_args()
net: add helper eth_addr_add()
...
This commit is contained in:
Linus Torvalds
commit
693fed981e
|
|
@ -236,7 +236,7 @@ What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/traceid
|
||||||
Date: November 2014
|
Date: November 2014
|
||||||
KernelVersion: 3.19
|
KernelVersion: 3.19
|
||||||
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
Contact: Mathieu Poirier <mathieu.poirier@linaro.org>
|
||||||
Description: (RW) Holds the trace ID that will appear in the trace stream
|
Description: (RO) Holds the trace ID that will appear in the trace stream
|
||||||
coming from this trace entity.
|
coming from this trace entity.
|
||||||
|
|
||||||
What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/trigger_event
|
What: /sys/bus/coresight/devices/<memory_map>.[etm|ptm]/trigger_event
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,13 @@
|
||||||
|
What: /sys/bus/coresight/devices/<tpdm-name>/integration_test
|
||||||
|
Date: January 2023
|
||||||
|
KernelVersion 6.2
|
||||||
|
Contact: Jinlong Mao (QUIC) <quic_jinlmao@quicinc.com>, Tao Zhang (QUIC) <quic_taozha@quicinc.com>
|
||||||
|
Description:
|
||||||
|
(Write) Run integration test for tpdm. Integration test
|
||||||
|
will generate test data for tpdm. It can help to make
|
||||||
|
sure that the trace path is enabled and the link configurations
|
||||||
|
are fine.
|
||||||
|
|
||||||
|
Accepts only one of the 2 values - 1 or 2.
|
||||||
|
1 : Generate 64 bits data
|
||||||
|
2 : Generate 32 bits data
|
||||||
|
|
@ -0,0 +1,31 @@
|
||||||
|
What: /sys/bus/coresight/devices/ultra_smb<N>/enable_sink
|
||||||
|
Date: January 2023
|
||||||
|
KernelVersion: 6.3
|
||||||
|
Contact: Junhao He <hejunhao3@huawei.com>
|
||||||
|
Description: (RW) Add/remove a SMB device from a trace path. There can be
|
||||||
|
multiple sources for a single SMB device.
|
||||||
|
|
||||||
|
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_size
|
||||||
|
Date: January 2023
|
||||||
|
KernelVersion: 6.3
|
||||||
|
Contact: Junhao He <hejunhao3@huawei.com>
|
||||||
|
Description: (RO) Shows the buffer size of each UltraSoc SMB device.
|
||||||
|
|
||||||
|
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/buf_status
|
||||||
|
Date: January 2023
|
||||||
|
KernelVersion: 6.3
|
||||||
|
Contact: Junhao He <hejunhao3@huawei.com>
|
||||||
|
Description: (RO) Shows the value of UltraSoc SMB status register.
|
||||||
|
BIT(0) is zero means buffer is empty.
|
||||||
|
|
||||||
|
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/read_pos
|
||||||
|
Date: January 2023
|
||||||
|
KernelVersion: 6.3
|
||||||
|
Contact: Junhao He <hejunhao3@huawei.com>
|
||||||
|
Description: (RO) Shows the value of UltraSoc SMB Read Pointer register.
|
||||||
|
|
||||||
|
What: /sys/bus/coresight/devices/ultra_smb<N>/mgmt/write_pos
|
||||||
|
Date: January 2023
|
||||||
|
KernelVersion: 6.3
|
||||||
|
Contact: Junhao He <hejunhao3@huawei.com>
|
||||||
|
Description: (RO) Shows the value of UltraSoc SMB Write Pointer register.
|
||||||
|
|
@ -19,6 +19,24 @@ Contact: linux-accelerators@lists.ozlabs.org
|
||||||
Description: Available instances left of the device
|
Description: Available instances left of the device
|
||||||
Return -ENODEV if uacce_ops get_available_instances is not provided
|
Return -ENODEV if uacce_ops get_available_instances is not provided
|
||||||
|
|
||||||
|
What: /sys/class/uacce/<dev_name>/isolate_strategy
|
||||||
|
Date: Nov 2022
|
||||||
|
KernelVersion: 6.1
|
||||||
|
Contact: linux-accelerators@lists.ozlabs.org
|
||||||
|
Description: (RW) A sysfs node that configure the error threshold for the hardware
|
||||||
|
isolation strategy. This size is a configured integer value, which is the
|
||||||
|
number of threshold for hardware errors occurred in one hour. The default is 0.
|
||||||
|
0 means never isolate the device. The maximum value is 65535. You can write
|
||||||
|
a number of threshold based on your hardware.
|
||||||
|
|
||||||
|
What: /sys/class/uacce/<dev_name>/isolate
|
||||||
|
Date: Nov 2022
|
||||||
|
KernelVersion: 6.1
|
||||||
|
Contact: linux-accelerators@lists.ozlabs.org
|
||||||
|
Description: (R) A sysfs node that read the device isolated state. The value 1
|
||||||
|
means the device is unavailable. The 0 means the device is
|
||||||
|
available.
|
||||||
|
|
||||||
What: /sys/class/uacce/<dev_name>/algorithms
|
What: /sys/class/uacce/<dev_name>/algorithms
|
||||||
Date: Feb 2020
|
Date: Feb 2020
|
||||||
KernelVersion: 5.7
|
KernelVersion: 5.7
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,16 @@
|
||||||
|
What: /sys/devices/platform/amba_pl/<dev>/errcnt
|
||||||
|
Date: Nov 2022
|
||||||
|
Contact: appana.durga.kedareswara.rao@amd.com
|
||||||
|
Description: This control file provides the fault detection count.
|
||||||
|
This file cannot be written.
|
||||||
|
Example:
|
||||||
|
# cat /sys/devices/platform/amba_pl/44a10000.tmr_manager/errcnt
|
||||||
|
1
|
||||||
|
|
||||||
|
What: /sys/devices/platform/amba_pl/<dev>/dis_block_break
|
||||||
|
Date: Nov 2022
|
||||||
|
Contact: appana.durga.kedareswara.rao@amd.com
|
||||||
|
Description: Write any value to it, This control file enables the break signal.
|
||||||
|
This file is write only.
|
||||||
|
Example:
|
||||||
|
# echo <any value> > /sys/devices/platform/amba_pl/44a10000.tmr_manager/dis_block_break
|
||||||
|
|
@ -0,0 +1,129 @@
|
||||||
|
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
||||||
|
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpda.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Trace, Profiling and Diagnostics Aggregator - TPDA
|
||||||
|
|
||||||
|
description: |
|
||||||
|
TPDAs are responsible for packetization and timestamping of data sets
|
||||||
|
utilizing the MIPI STPv2 packet protocol. Pulling data sets from one or
|
||||||
|
more attached TPDM and pushing the resultant (packetized) data out a
|
||||||
|
master ATB interface. Performing an arbitrated ATB interleaving (funneling)
|
||||||
|
task for free-flowing data from TPDM (i.e. CMB and DSB data set flows).
|
||||||
|
|
||||||
|
There is no strict binding between TPDM and TPDA. TPDA can have multiple
|
||||||
|
TPDMs connect to it. But There must be only one TPDA in the path from the
|
||||||
|
TPDM source to TMC sink. TPDM can directly connect to TPDA's inport or
|
||||||
|
connect to funnel which will connect to TPDA's inport.
|
||||||
|
|
||||||
|
We can use the commands are similar to the below to validate TPDMs.
|
||||||
|
Enable coresight sink first.
|
||||||
|
|
||||||
|
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
|
||||||
|
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
|
||||||
|
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
|
||||||
|
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
|
||||||
|
|
||||||
|
The test data will be collected in the coresight sink which is enabled.
|
||||||
|
If rwp register of the sink is keeping updating when do integration_test
|
||||||
|
(by cat tmc_etf0/mgmt/rwp), it means there is data generated from TPDM
|
||||||
|
to sink.
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||||
|
- Tao Zhang <quic_taozha@quicinc.com>
|
||||||
|
|
||||||
|
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||||
|
select:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,coresight-tpda
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
|
||||||
|
properties:
|
||||||
|
$nodename:
|
||||||
|
pattern: "^tpda(@[0-9a-f]+)$"
|
||||||
|
compatible:
|
||||||
|
items:
|
||||||
|
- const: qcom,coresight-tpda
|
||||||
|
- const: arm,primecell
|
||||||
|
|
||||||
|
reg:
|
||||||
|
minItems: 1
|
||||||
|
maxItems: 2
|
||||||
|
|
||||||
|
clocks:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
clock-names:
|
||||||
|
items:
|
||||||
|
- const: apb_pclk
|
||||||
|
|
||||||
|
in-ports:
|
||||||
|
type: object
|
||||||
|
description: |
|
||||||
|
Input connections from TPDM to TPDA
|
||||||
|
$ref: /schemas/graph.yaml#/properties/ports
|
||||||
|
|
||||||
|
out-ports:
|
||||||
|
type: object
|
||||||
|
description: |
|
||||||
|
Output connections from the TPDA to legacy CoreSight trace bus.
|
||||||
|
$ref: /schemas/graph.yaml#/properties/ports
|
||||||
|
|
||||||
|
properties:
|
||||||
|
port:
|
||||||
|
description:
|
||||||
|
Output connection from the TPDA to legacy CoreSight Trace bus.
|
||||||
|
$ref: /schemas/graph.yaml#/properties/port
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- clocks
|
||||||
|
- clock-names
|
||||||
|
- in-ports
|
||||||
|
- out-ports
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
# minimum tpda definition.
|
||||||
|
- |
|
||||||
|
tpda@6004000 {
|
||||||
|
compatible = "qcom,coresight-tpda", "arm,primecell";
|
||||||
|
reg = <0x6004000 0x1000>;
|
||||||
|
|
||||||
|
clocks = <&aoss_qmp>;
|
||||||
|
clock-names = "apb_pclk";
|
||||||
|
|
||||||
|
in-ports {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
port@0 {
|
||||||
|
reg = <0>;
|
||||||
|
tpda_qdss_0_in_tpdm_dcc: endpoint {
|
||||||
|
remote-endpoint =
|
||||||
|
<&tpdm_dcc_out_tpda_qdss_0>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
out-ports {
|
||||||
|
port {
|
||||||
|
tpda_qdss_out_funnel_in0: endpoint {
|
||||||
|
remote-endpoint =
|
||||||
|
<&funnel_in0_in_tpda_qdss>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
...
|
||||||
|
|
@ -0,0 +1,93 @@
|
||||||
|
# SPDX-License-Identifier: GPL-2.0-only or BSD-2-Clause
|
||||||
|
# Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/arm/qcom,coresight-tpdm.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Trace, Profiling and Diagnostics Monitor - TPDM
|
||||||
|
|
||||||
|
description: |
|
||||||
|
The TPDM or Monitor serves as data collection component for various dataset
|
||||||
|
types specified in the QPMDA spec. It covers Implementation defined ((ImplDef),
|
||||||
|
Basic Counts (BC), Tenure Counts (TC), Continuous Multi-Bit (CMB), and Discrete
|
||||||
|
Single Bit (DSB). It performs data collection in the data producing clock
|
||||||
|
domain and transfers it to the data collection time domain, generally ATB
|
||||||
|
clock domain.
|
||||||
|
|
||||||
|
The primary use case of the TPDM is to collect data from different data
|
||||||
|
sources and send it to a TPDA for packetization, timestamping, and funneling.
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Mao Jinlong <quic_jinlmao@quicinc.com>
|
||||||
|
- Tao Zhang <quic_taozha@quicinc.com>
|
||||||
|
|
||||||
|
# Need a custom select here or 'arm,primecell' will match on lots of nodes
|
||||||
|
select:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,coresight-tpdm
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
|
||||||
|
properties:
|
||||||
|
$nodename:
|
||||||
|
pattern: "^tpdm(@[0-9a-f]+)$"
|
||||||
|
compatible:
|
||||||
|
items:
|
||||||
|
- const: qcom,coresight-tpdm
|
||||||
|
- const: arm,primecell
|
||||||
|
|
||||||
|
reg:
|
||||||
|
minItems: 1
|
||||||
|
maxItems: 2
|
||||||
|
|
||||||
|
clocks:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
clock-names:
|
||||||
|
items:
|
||||||
|
- const: apb_pclk
|
||||||
|
|
||||||
|
out-ports:
|
||||||
|
description: |
|
||||||
|
Output connections from the TPDM to coresight funnel/TPDA.
|
||||||
|
$ref: /schemas/graph.yaml#/properties/ports
|
||||||
|
|
||||||
|
properties:
|
||||||
|
port:
|
||||||
|
description: Output connection from the TPDM to coresight
|
||||||
|
funnel/TPDA.
|
||||||
|
$ref: /schemas/graph.yaml#/properties/port
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- clocks
|
||||||
|
- clock-names
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
# minimum TPDM definition. TPDM connect to coresight TPDA.
|
||||||
|
- |
|
||||||
|
tpdm@684c000 {
|
||||||
|
compatible = "qcom,coresight-tpdm", "arm,primecell";
|
||||||
|
reg = <0x0684c000 0x1000>;
|
||||||
|
|
||||||
|
clocks = <&aoss_qmp>;
|
||||||
|
clock-names = "apb_pclk";
|
||||||
|
|
||||||
|
out-ports {
|
||||||
|
port {
|
||||||
|
tpdm_prng_out_tpda_qdss: endpoint {
|
||||||
|
remote-endpoint =
|
||||||
|
<&tpda_qdss_in_tpdm_prng>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
|
||||||
|
...
|
||||||
|
|
@ -41,7 +41,7 @@ unevaluatedProperties: false
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -39,7 +39,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -59,7 +59,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -49,7 +49,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
@ -64,7 +64,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -39,7 +39,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
@ -54,7 +54,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -36,7 +36,7 @@ unevaluatedProperties: false
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -44,7 +44,7 @@ examples:
|
||||||
|
|
||||||
accel@f {
|
accel@f {
|
||||||
compatible = "kionix,kxtf9";
|
compatible = "kionix,kxtf9";
|
||||||
reg = <0x0F>;
|
reg = <0xf>;
|
||||||
mount-matrix = "0", "1", "0",
|
mount-matrix = "0", "1", "0",
|
||||||
"1", "0", "0",
|
"1", "0", "0",
|
||||||
"0", "0", "1";
|
"0", "0", "1";
|
||||||
|
|
|
||||||
|
|
@ -1,9 +1,8 @@
|
||||||
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||||
|
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#"
|
$id: http://devicetree.org/schemas/iio/accel/memsensing,msa311.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: MEMSensing digital 3-Axis accelerometer
|
title: MEMSensing digital 3-Axis accelerometer
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -50,7 +50,7 @@ unevaluatedProperties: false
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
@ -65,7 +65,7 @@ examples:
|
||||||
};
|
};
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -61,7 +61,7 @@ required:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^channel@([0-9]|1[0-5])$":
|
"^channel@([0-9]|1[0-5])$":
|
||||||
$ref: "adc.yaml"
|
$ref: adc.yaml
|
||||||
type: object
|
type: object
|
||||||
description: |
|
description: |
|
||||||
Represents the external channels which are connected to the ADC.
|
Represents the external channels which are connected to the ADC.
|
||||||
|
|
|
||||||
|
|
@ -99,7 +99,7 @@ unevaluatedProperties: false
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -43,7 +43,7 @@ required:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^channel@[0-7]$":
|
"^channel@[0-7]$":
|
||||||
$ref: "adc.yaml"
|
$ref: adc.yaml
|
||||||
type: object
|
type: object
|
||||||
description: |
|
description: |
|
||||||
Represents the external channels which are connected to the ADC.
|
Represents the external channels which are connected to the ADC.
|
||||||
|
|
|
||||||
|
|
@ -112,7 +112,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -72,7 +72,7 @@ additionalProperties: false
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -41,7 +41,7 @@ properties:
|
||||||
description: Startup time expressed in ms, it depends on SoC.
|
description: Startup time expressed in ms, it depends on SoC.
|
||||||
|
|
||||||
atmel,trigger-edge-type:
|
atmel,trigger-edge-type:
|
||||||
$ref: '/schemas/types.yaml#/definitions/uint32'
|
$ref: /schemas/types.yaml#/definitions/uint32
|
||||||
description:
|
description:
|
||||||
One of possible edge types for the ADTRG hardware trigger pin.
|
One of possible edge types for the ADTRG hardware trigger pin.
|
||||||
When the specific edge type is detected, the conversion will
|
When the specific edge type is detected, the conversion will
|
||||||
|
|
|
||||||
|
|
@ -1,8 +1,8 @@
|
||||||
# SPDX-License-Identifier: GPL-2.0
|
# SPDX-License-Identifier: GPL-2.0
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#"
|
$id: http://devicetree.org/schemas/iio/adc/avia-hx711.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: AVIA HX711 ADC chip for weight cells
|
title: AVIA HX711 ADC chip for weight cells
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,47 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/adc/cirrus,ep9301-adc.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Cirrus Logic EP930x internal ADC
|
||||||
|
|
||||||
|
description: |
|
||||||
|
Cirrus Logic EP9301/EP9302 SoCs' internal ADC block.
|
||||||
|
|
||||||
|
User's manual:
|
||||||
|
https://cdn.embeddedts.com/resource-attachments/ts-7000_ep9301-ug.pdf
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Alexander Sverdlin <alexander.sverdlin@gmail.com>
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
const: cirrus,ep9301-adc
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
clocks:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
interrupts:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- clocks
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
adc: adc@80900000 {
|
||||||
|
compatible = "cirrus,ep9301-adc";
|
||||||
|
reg = <0x80900000 0x28>;
|
||||||
|
clocks = <&syscon 24>;
|
||||||
|
interrupt-parent = <&vic1>;
|
||||||
|
interrupts = <30>;
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -2,8 +2,8 @@
|
||||||
# Copyright 2019-2020 Artur Rojek
|
# Copyright 2019-2020 Artur Rojek
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#"
|
$id: http://devicetree.org/schemas/iio/adc/ingenic,adc.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: Ingenic JZ47xx ADC controller IIO
|
title: Ingenic JZ47xx ADC controller IIO
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -10,7 +10,7 @@ maintainers:
|
||||||
- Jonathan Cameron <jic23@kernel.org>
|
- Jonathan Cameron <jic23@kernel.org>
|
||||||
|
|
||||||
description: |
|
description: |
|
||||||
Family of simple ADCs with i2c inteface and internal references.
|
Family of simple ADCs with i2c interface and internal references.
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
compatible:
|
compatible:
|
||||||
|
|
|
||||||
|
|
@ -10,7 +10,7 @@ maintainers:
|
||||||
- Jonathan Cameron <jic23@kernel.org>
|
- Jonathan Cameron <jic23@kernel.org>
|
||||||
|
|
||||||
description: |
|
description: |
|
||||||
Family of ADCs with i2c inteface, internal references and threshold
|
Family of ADCs with i2c interface, internal references and threshold
|
||||||
monitoring.
|
monitoring.
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
|
|
|
||||||
|
|
@ -2,8 +2,8 @@
|
||||||
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
|
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#"
|
$id: http://devicetree.org/schemas/iio/adc/microchip,mcp3911.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: Microchip MCP3911 Dual channel analog front end (ADC)
|
title: Microchip MCP3911 Dual channel analog front end (ADC)
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,81 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/adc/nxp,imx93-adc.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: NXP iMX93 ADC
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Haibo Chen <haibo.chen@nxp.com>
|
||||||
|
|
||||||
|
description:
|
||||||
|
The ADC on iMX93 is a 8-channel 12-bit 1MS/s ADC with 4 channels
|
||||||
|
connected to pins. it support normal and inject mode, include
|
||||||
|
One-Shot and Scan (continuous) conversions. Programmable DMA
|
||||||
|
enables for each channel Also this ADC contain alternate analog
|
||||||
|
watchdog thresholds, select threshold through input ports. And
|
||||||
|
also has Self-test logic and Software-initiated calibration.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
const: nxp,imx93-adc
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
interrupts:
|
||||||
|
items:
|
||||||
|
- description: WDGnL, watchdog threshold interrupt requests.
|
||||||
|
- description: WDGnH, watchdog threshold interrupt requests.
|
||||||
|
- description: normal conversion, include EOC (End of Conversion),
|
||||||
|
ECH (End of Chain), JEOC (End of Injected Conversion) and
|
||||||
|
JECH (End of injected Chain).
|
||||||
|
- description: Self-testing Interrupts.
|
||||||
|
|
||||||
|
clocks:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
clock-names:
|
||||||
|
const: ipg
|
||||||
|
|
||||||
|
vref-supply:
|
||||||
|
description:
|
||||||
|
The reference voltage which used to establish channel scaling.
|
||||||
|
|
||||||
|
"#io-channel-cells":
|
||||||
|
const: 1
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- interrupts
|
||||||
|
- clocks
|
||||||
|
- clock-names
|
||||||
|
- vref-supply
|
||||||
|
- "#io-channel-cells"
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
|
#include <dt-bindings/clock/imx93-clock.h>
|
||||||
|
#include <dt-bindings/interrupt-controller/arm-gic.h>
|
||||||
|
soc {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <1>;
|
||||||
|
adc@44530000 {
|
||||||
|
compatible = "nxp,imx93-adc";
|
||||||
|
reg = <0x44530000 0x10000>;
|
||||||
|
interrupts = <GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH>,
|
||||||
|
<GIC_SPI 268 IRQ_TYPE_LEVEL_HIGH>;
|
||||||
|
clocks = <&clk IMX93_CLK_ADC1_GATE>;
|
||||||
|
clock-names = "ipg";
|
||||||
|
vref-supply = <®_vref_1v8>;
|
||||||
|
#io-channel-cells = <1>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -20,6 +20,7 @@ properties:
|
||||||
compatible:
|
compatible:
|
||||||
items:
|
items:
|
||||||
- enum:
|
- enum:
|
||||||
|
- qcom,pm8226-iadc
|
||||||
- qcom,pm8941-iadc
|
- qcom,pm8941-iadc
|
||||||
- const: qcom,spmi-iadc
|
- const: qcom,spmi-iadc
|
||||||
|
|
||||||
|
|
@ -49,7 +50,7 @@ additionalProperties: false
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spmi_bus {
|
spmi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
pmic_iadc: adc@3600 {
|
pmic_iadc: adc@3600 {
|
||||||
|
|
|
||||||
|
|
@ -69,7 +69,7 @@ required:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^channel@[0-7]$":
|
"^channel@[0-7]$":
|
||||||
$ref: "adc.yaml"
|
$ref: adc.yaml
|
||||||
type: object
|
type: object
|
||||||
description: |
|
description: |
|
||||||
Represents the external channels which are connected to the ADC.
|
Represents the external channels which are connected to the ADC.
|
||||||
|
|
|
||||||
|
|
@ -52,7 +52,7 @@ properties:
|
||||||
vdd-supply: true
|
vdd-supply: true
|
||||||
|
|
||||||
samsung,syscon-phandle:
|
samsung,syscon-phandle:
|
||||||
$ref: '/schemas/types.yaml#/definitions/phandle'
|
$ref: /schemas/types.yaml#/definitions/phandle
|
||||||
description:
|
description:
|
||||||
Phandle to the PMU system controller node (to access the ADC_PHY
|
Phandle to the PMU system controller node (to access the ADC_PHY
|
||||||
register on Exynos3250/4x12/5250/5420/5800).
|
register on Exynos3250/4x12/5250/5420/5800).
|
||||||
|
|
@ -150,7 +150,7 @@ examples:
|
||||||
|
|
||||||
adc@126c0000 {
|
adc@126c0000 {
|
||||||
compatible = "samsung,exynos3250-adc";
|
compatible = "samsung,exynos3250-adc";
|
||||||
reg = <0x126C0000 0x100>;
|
reg = <0x126c0000 0x100>;
|
||||||
interrupts = <0 137 0>;
|
interrupts = <0 137 0>;
|
||||||
#io-channel-cells = <1>;
|
#io-channel-cells = <1>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,8 +1,8 @@
|
||||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#"
|
$id: http://devicetree.org/schemas/iio/adc/st,stm32-adc.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: STMicroelectronics STM32 ADC
|
title: STMicroelectronics STM32 ADC
|
||||||
|
|
||||||
|
|
@ -80,7 +80,7 @@ properties:
|
||||||
description:
|
description:
|
||||||
Phandle to system configuration controller. It can be used to control the
|
Phandle to system configuration controller. It can be used to control the
|
||||||
analog circuitry on stm32mp1.
|
analog circuitry on stm32mp1.
|
||||||
$ref: "/schemas/types.yaml#/definitions/phandle-array"
|
$ref: /schemas/types.yaml#/definitions/phandle-array
|
||||||
|
|
||||||
interrupt-controller: true
|
interrupt-controller: true
|
||||||
|
|
||||||
|
|
@ -341,7 +341,7 @@ patternProperties:
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^channel@([0-9]|1[0-9])$":
|
"^channel@([0-9]|1[0-9])$":
|
||||||
type: object
|
type: object
|
||||||
$ref: "adc.yaml"
|
$ref: adc.yaml
|
||||||
description: Represents the external channels which are connected to the ADC.
|
description: Represents the external channels which are connected to the ADC.
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
|
|
|
||||||
|
|
@ -35,10 +35,8 @@ additionalProperties: false
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
stmpe {
|
adc {
|
||||||
stmpe_adc {
|
|
||||||
compatible = "st,stmpe-adc";
|
compatible = "st,stmpe-adc";
|
||||||
st,norequest-mask = <0x0F>; /* dont use ADC CH3-0 */
|
st,norequest-mask = <0x0f>; /* dont use ADC CH3-0 */
|
||||||
};
|
|
||||||
};
|
};
|
||||||
...
|
...
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,55 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/adc/ti,adc081c.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: TI Single-channel I2C ADCs
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Jonathan Cameron <jic23@kernel.org>
|
||||||
|
- Lars-Peter Clausen <lars@metafoo.de>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
Single-channel ADC supporting 8, 10, or 12-bit samples and high/low alerts.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- ti,adc081c
|
||||||
|
- ti,adc101c
|
||||||
|
- ti,adc121c
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
interrupts:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
vref-supply:
|
||||||
|
description:
|
||||||
|
Regulator for the combined power supply and voltage reference
|
||||||
|
|
||||||
|
"#io-channel-cells":
|
||||||
|
const: 1
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- vref-supply
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
i2c {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
adc@52 {
|
||||||
|
compatible = "ti,adc081c";
|
||||||
|
reg = <0x52>;
|
||||||
|
vref-supply = <®_2p5v>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -77,7 +77,7 @@ required:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^channel@([0-7])$":
|
"^channel@([0-7])$":
|
||||||
$ref: "adc.yaml"
|
$ref: adc.yaml
|
||||||
type: object
|
type: object
|
||||||
description: |
|
description: |
|
||||||
Represents the external channels which are connected to the ADC.
|
Represents the external channels which are connected to the ADC.
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,110 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/adc/ti,ads7924.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: TI ADS7924 4 channels 12 bits I2C analog to digital converter
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Hugo Villeneuve <hvilleneuve@dimonoff.com>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
Texas Instruments ADS7924 4 channels 12 bits I2C analog to digital converter
|
||||||
|
|
||||||
|
Specifications:
|
||||||
|
https://www.ti.com/lit/gpn/ads7924
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
const: ti,ads7924
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
vref-supply:
|
||||||
|
description:
|
||||||
|
The regulator supply for the ADC reference voltage (AVDD)
|
||||||
|
|
||||||
|
reset-gpios:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
interrupts:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
"#address-cells":
|
||||||
|
const: 1
|
||||||
|
|
||||||
|
"#size-cells":
|
||||||
|
const: 0
|
||||||
|
|
||||||
|
"#io-channel-cells":
|
||||||
|
const: 1
|
||||||
|
|
||||||
|
patternProperties:
|
||||||
|
"^channel@[0-3]+$":
|
||||||
|
$ref: adc.yaml
|
||||||
|
|
||||||
|
description: |
|
||||||
|
Represents the external channels which are connected to the ADC.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
reg:
|
||||||
|
description: |
|
||||||
|
The channel number. It can have up to 4 channels numbered from 0 to 3.
|
||||||
|
items:
|
||||||
|
- minimum: 0
|
||||||
|
maximum: 3
|
||||||
|
|
||||||
|
label: true
|
||||||
|
|
||||||
|
required:
|
||||||
|
- reg
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- vref-supply
|
||||||
|
- "#address-cells"
|
||||||
|
- "#size-cells"
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
i2c {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
adc@48 {
|
||||||
|
compatible = "ti,ads7924";
|
||||||
|
reg = <0x48>;
|
||||||
|
vref-supply = <&ads7924_reg>;
|
||||||
|
reset-gpios = <&gpio 5 GPIO_ACTIVE_LOW>;
|
||||||
|
interrupts = <25 IRQ_TYPE_EDGE_FALLING>;
|
||||||
|
interrupt-parent = <&gpio>;
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
channel@0 {
|
||||||
|
reg = <0>;
|
||||||
|
label = "CH0";
|
||||||
|
};
|
||||||
|
channel@1 {
|
||||||
|
reg = <1>;
|
||||||
|
label = "CH1";
|
||||||
|
};
|
||||||
|
channel@2 {
|
||||||
|
reg = <2>;
|
||||||
|
label = "CH2";
|
||||||
|
};
|
||||||
|
channel@3 {
|
||||||
|
reg = <3>;
|
||||||
|
label = "CH3";
|
||||||
|
};
|
||||||
|
};
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -0,0 +1,70 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/adc/ti,lmp92064.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Texas Instruments LMP92064 Precision Current and Voltage Sensor.
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Leonard Göhrs <l.goehrs@pengutronix.de>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
The LMP92064 is a two channel ADC intended for combined voltage and current
|
||||||
|
measurements.
|
||||||
|
|
||||||
|
The device contains two ADCs to allow simultaneous sampling of voltage and
|
||||||
|
current and thus of instantaneous power consumption.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- ti,lmp92064
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
vdd-supply:
|
||||||
|
description: Regulator that provides power to the main part of the chip
|
||||||
|
|
||||||
|
vdig-supply:
|
||||||
|
description: |
|
||||||
|
Regulator that provides power to the digital I/O part of the chip
|
||||||
|
|
||||||
|
shunt-resistor-micro-ohms:
|
||||||
|
description: |
|
||||||
|
Value of the shunt resistor (in µΩ) connected between INCP and INCN,
|
||||||
|
across which current is measured. Used to provide correct scaling of the
|
||||||
|
raw ADC measurement.
|
||||||
|
|
||||||
|
reset-gpios:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- shunt-resistor-micro-ohms
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||||
|
|
||||||
|
unevaluatedProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
|
spi {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
adc@0 {
|
||||||
|
compatible = "ti,lmp92064";
|
||||||
|
reg = <0>;
|
||||||
|
vdd-supply = <&vdd>;
|
||||||
|
vdig-supply = <&vdd>;
|
||||||
|
spi-max-frequency = <20000000>;
|
||||||
|
shunt-resistor-micro-ohms = <15000>;
|
||||||
|
reset-gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -41,7 +41,7 @@ required:
|
||||||
|
|
||||||
patternProperties:
|
patternProperties:
|
||||||
"^channel@[0-7]$":
|
"^channel@[0-7]$":
|
||||||
$ref: "adc.yaml"
|
$ref: adc.yaml
|
||||||
type: object
|
type: object
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
|
|
|
||||||
|
|
@ -12,6 +12,7 @@ maintainers:
|
||||||
|
|
||||||
description: |
|
description: |
|
||||||
DAC devices supporting both SPI and I2C interfaces.
|
DAC devices supporting both SPI and I2C interfaces.
|
||||||
|
|
||||||
properties:
|
properties:
|
||||||
compatible:
|
compatible:
|
||||||
enum:
|
enum:
|
||||||
|
|
|
||||||
|
|
@ -33,6 +33,7 @@ properties:
|
||||||
- description: I2C devices
|
- description: I2C devices
|
||||||
enum:
|
enum:
|
||||||
- adi,ad5311r
|
- adi,ad5311r
|
||||||
|
- adi,ad5337r
|
||||||
- adi,ad5338r
|
- adi,ad5338r
|
||||||
- adi,ad5671r
|
- adi,ad5671r
|
||||||
- adi,ad5675r
|
- adi,ad5675r
|
||||||
|
|
|
||||||
|
|
@ -2,8 +2,8 @@
|
||||||
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
|
# Copyright 2019 Marcus Folkesson <marcus.folkesson@gmail.com>
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc1660.yaml#"
|
$id: http://devicetree.org/schemas/iio/dac/lltc,ltc1660.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: Linear Technology Micropower octal 8-Bit and 10-Bit DACs
|
title: Linear Technology Micropower octal 8-Bit and 10-Bit DACs
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -1,8 +1,8 @@
|
||||||
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
|
# SPDX-License-Identifier: GPL-2.0 OR BSD-2-Clause
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#"
|
$id: http://devicetree.org/schemas/iio/dac/lltc,ltc2632.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC
|
title: Linear Technology LTC263x 12-/10-/8-Bit Rail-to-Rail DAC
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,49 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/dac/maxim,max5522.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Maxim Integrated MAX5522 Dual 10-bit Voltage-Output SPI DACs
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Angelo Dureghello <angelo.dureghello@timesys.com>
|
||||||
|
- Jonathan Cameron <jic23@kernel.org>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
Datasheet available at:
|
||||||
|
https://www.analog.com/en/products/max5522.html
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
const: maxim,max5522
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
vdd-supply: true
|
||||||
|
vrefin-supply: true
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- vrefin-supply
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: /schemas/spi/spi-peripheral-props.yaml#
|
||||||
|
|
||||||
|
unevaluatedProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
spi {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
dac@0 {
|
||||||
|
compatible = "maxim,max5522";
|
||||||
|
reg = <0>;
|
||||||
|
vrefin-supply = <&vref>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -1,8 +1,8 @@
|
||||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#"
|
$id: http://devicetree.org/schemas/iio/dac/st,stm32-dac.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: STMicroelectronics STM32 DAC
|
title: STMicroelectronics STM32 DAC
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -46,7 +46,7 @@ examples:
|
||||||
|
|
||||||
dac@4c {
|
dac@4c {
|
||||||
compatible = "ti,dac5571";
|
compatible = "ti,dac5571";
|
||||||
reg = <0x4C>;
|
reg = <0x4c>;
|
||||||
vref-supply = <&vdd_supply>;
|
vref-supply = <&vdd_supply>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -53,7 +53,7 @@ unevaluatedProperties: false
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -65,7 +65,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
|
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
@ -81,7 +81,7 @@ examples:
|
||||||
interrupt-names = "INT1";
|
interrupt-names = "INT1";
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -42,7 +42,7 @@ examples:
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
heart_mon@0 {
|
heart-mon@0 {
|
||||||
compatible = "ti,afe4403";
|
compatible = "ti,afe4403";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
spi-max-frequency = <10000000>;
|
spi-max-frequency = <10000000>;
|
||||||
|
|
|
||||||
|
|
@ -39,7 +39,7 @@ examples:
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
heart_mon@58 {
|
heart-mon@58 {
|
||||||
compatible = "ti,afe4404";
|
compatible = "ti,afe4404";
|
||||||
reg = <0x58>;
|
reg = <0x58>;
|
||||||
tx-supply = <&vbat>;
|
tx-supply = <&vbat>;
|
||||||
|
|
|
||||||
|
|
@ -34,7 +34,7 @@ additionalProperties: false
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
humidity_sensor {
|
humidity-sensor {
|
||||||
compatible = "dht11";
|
compatible = "dht11";
|
||||||
gpios = <&gpio0 6 0>;
|
gpios = <&gpio0 6 0>;
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -35,7 +35,7 @@ additionalProperties: false
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -42,7 +42,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -65,7 +65,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
@ -81,7 +81,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -49,7 +49,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
@ -65,7 +65,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
spi0 {
|
spi {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -63,7 +63,7 @@ properties:
|
||||||
description: if defined provides VDD IO power to the sensor.
|
description: if defined provides VDD IO power to the sensor.
|
||||||
|
|
||||||
st,drdy-int-pin:
|
st,drdy-int-pin:
|
||||||
$ref: '/schemas/types.yaml#/definitions/uint32'
|
$ref: /schemas/types.yaml#/definitions/uint32
|
||||||
description: |
|
description: |
|
||||||
The pin on the package that will be used to signal data ready
|
The pin on the package that will be used to signal data ready
|
||||||
enum:
|
enum:
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,75 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/iio/magnetometer/ti,tmag5273.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: TI TMAG5273 Low-Power Linear 3D Hall-Effect Sensor
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Gerald Loacker <gerald.loacker@wolfvision.net>
|
||||||
|
|
||||||
|
description:
|
||||||
|
The TI TMAG5273 is a low-power linear 3D Hall-effect sensor. This device
|
||||||
|
integrates three independent Hall-effect sensors in the X, Y, and Z axes.
|
||||||
|
The device has an integrated temperature sensor available. The TMAG5273
|
||||||
|
can be configured through the I2C interface to enable any combination of
|
||||||
|
magnetic axes and temperature measurements. An integrated angle calculation
|
||||||
|
engine (CORDIC) provides full 360° angular position information for both
|
||||||
|
on-axis and off-axis angle measurement topologies. The angle calculation is
|
||||||
|
performed using two user-selected magnetic axes.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
const: ti,tmag5273
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
"#io-channel-cells":
|
||||||
|
const: 1
|
||||||
|
|
||||||
|
ti,angle-measurement:
|
||||||
|
$ref: /schemas/types.yaml#/definitions/string
|
||||||
|
description:
|
||||||
|
Enables angle measurement in the selected plane.
|
||||||
|
If not specified, "x-y" will be anables as default.
|
||||||
|
enum:
|
||||||
|
- off
|
||||||
|
- x-y
|
||||||
|
- y-z
|
||||||
|
- x-z
|
||||||
|
|
||||||
|
vcc-supply:
|
||||||
|
description:
|
||||||
|
A regulator providing 1.7 V to 3.6 V supply voltage on the VCC pin,
|
||||||
|
typically 3.3 V.
|
||||||
|
|
||||||
|
interrupts:
|
||||||
|
description:
|
||||||
|
The low active interrupt can be configured to be fixed width or latched.
|
||||||
|
Interrupt events can be configured to be generated from magnetic
|
||||||
|
thresholds or when a conversion is completed.
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
i2c {
|
||||||
|
#address-cells = <1>;
|
||||||
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
magnetometer@35 {
|
||||||
|
compatible = "ti,tmag5273";
|
||||||
|
reg = <0x35>;
|
||||||
|
#io-channel-cells = <1>;
|
||||||
|
ti,angle-measurement = "x-z";
|
||||||
|
vcc-supply = <&vcc3v3>;
|
||||||
|
};
|
||||||
|
};
|
||||||
|
...
|
||||||
|
|
@ -44,7 +44,7 @@ examples:
|
||||||
|
|
||||||
potentiometer@2f {
|
potentiometer@2f {
|
||||||
compatible = "adi,ad5272-020";
|
compatible = "adi,ad5272-020";
|
||||||
reg = <0x2F>;
|
reg = <0x2f>;
|
||||||
reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
reset-gpios = <&gpio3 6 GPIO_ACTIVE_LOW>;
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
|
|
|
||||||
|
|
@ -39,7 +39,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
|
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -60,7 +60,7 @@ examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/gpio/gpio.h>
|
#include <dt-bindings/gpio/gpio.h>
|
||||||
#include <dt-bindings/interrupt-controller/irq.h>
|
#include <dt-bindings/interrupt-controller/irq.h>
|
||||||
i2c0 {
|
i2c {
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
pressure@77 {
|
pressure@77 {
|
||||||
|
|
|
||||||
|
|
@ -1,7 +1,6 @@
|
||||||
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
|
|
||||||
$id: http://devicetree.org/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#
|
$id: http://devicetree.org/schemas/iio/proximity/google,cros-ec-mkbp-proximity.yaml#
|
||||||
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -36,7 +36,7 @@ properties:
|
||||||
const: 1
|
const: 1
|
||||||
|
|
||||||
semtech,resolution:
|
semtech,resolution:
|
||||||
$ref: /schemas/types.yaml#/definitions/uint32-array
|
$ref: /schemas/types.yaml#/definitions/uint32
|
||||||
enum: [8, 16, 32, 64, 128, 256, 512, 1024]
|
enum: [8, 16, 32, 64, 128, 256, 512, 1024]
|
||||||
description:
|
description:
|
||||||
Capacitance measurement resolution. For both phases, "reference" and
|
Capacitance measurement resolution. For both phases, "reference" and
|
||||||
|
|
|
||||||
|
|
@ -39,6 +39,7 @@ properties:
|
||||||
- st,lis3lv02dl-accel
|
- st,lis3lv02dl-accel
|
||||||
- st,lng2dm-accel
|
- st,lng2dm-accel
|
||||||
- st,lsm303agr-accel
|
- st,lsm303agr-accel
|
||||||
|
- st,lsm303c-accel
|
||||||
- st,lsm303dl-accel
|
- st,lsm303dl-accel
|
||||||
- st,lsm303dlh-accel
|
- st,lsm303dlh-accel
|
||||||
- st,lsm303dlhc-accel
|
- st,lsm303dlhc-accel
|
||||||
|
|
@ -66,6 +67,7 @@ properties:
|
||||||
- st,lis2mdl
|
- st,lis2mdl
|
||||||
- st,lis3mdl-magn
|
- st,lis3mdl-magn
|
||||||
- st,lsm303agr-magn
|
- st,lsm303agr-magn
|
||||||
|
- st,lsm303c-magn
|
||||||
- st,lsm303dlh-magn
|
- st,lsm303dlh-magn
|
||||||
- st,lsm303dlhc-magn
|
- st,lsm303dlhc-magn
|
||||||
- st,lsm303dlm-magn
|
- st,lsm303dlm-magn
|
||||||
|
|
|
||||||
|
|
@ -519,9 +519,9 @@ examples:
|
||||||
reg = <12>;
|
reg = <12>;
|
||||||
adi,sensor-type = <26>; //Steinhart
|
adi,sensor-type = <26>; //Steinhart
|
||||||
adi,rsense-handle = <&rsense2>;
|
adi,rsense-handle = <&rsense2>;
|
||||||
adi,custom-steinhart = <0x00F371EC 0x12345678
|
adi,custom-steinhart = <0x00f371ec 0x12345678
|
||||||
0x2C0F8733 0x10018C66 0xA0FEACCD
|
0x2c0f8733 0x10018c66 0xa0feaccd
|
||||||
0x90021D99>; //6 entries
|
0x90021d99>; //6 entries
|
||||||
};
|
};
|
||||||
|
|
||||||
thermocouple@20 {
|
thermocouple@20 {
|
||||||
|
|
@ -540,7 +540,6 @@ examples:
|
||||||
/bits/ 64 <188700000 922500000>,
|
/bits/ 64 <188700000 922500000>,
|
||||||
/bits/ 64 <460400000 1000000000>; //10 pairs
|
/bits/ 64 <460400000 1000000000>; //10 pairs
|
||||||
};
|
};
|
||||||
|
|
||||||
};
|
};
|
||||||
};
|
};
|
||||||
...
|
...
|
||||||
|
|
|
||||||
|
|
@ -43,7 +43,7 @@ examples:
|
||||||
#address-cells = <1>;
|
#address-cells = <1>;
|
||||||
#size-cells = <0>;
|
#size-cells = <0>;
|
||||||
|
|
||||||
temp_sensor@0 {
|
temperature-sensor@0 {
|
||||||
compatible = "maxim,max31865";
|
compatible = "maxim,max31865";
|
||||||
reg = <0>;
|
reg = <0>;
|
||||||
spi-max-frequency = <400000>;
|
spi-max-frequency = <400000>;
|
||||||
|
|
|
||||||
|
|
@ -1,10 +1,10 @@
|
||||||
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||||
%YAML 1.2
|
%YAML 1.2
|
||||||
---
|
---
|
||||||
$id: "http://devicetree.org/schemas/iio/temperature/ti,tmp117.yaml#"
|
$id: http://devicetree.org/schemas/iio/temperature/ti,tmp117.yaml#
|
||||||
$schema: "http://devicetree.org/meta-schemas/core.yaml#"
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
title: "TI TMP117 - Digital temperature sensor with integrated NV memory"
|
title: TI TMP117 - Digital temperature sensor with integrated NV memory
|
||||||
|
|
||||||
description: |
|
description: |
|
||||||
TI TMP117 - Digital temperature sensor with integrated NV memory that supports
|
TI TMP117 - Digital temperature sensor with integrated NV memory that supports
|
||||||
|
|
|
||||||
|
|
@ -27,11 +27,13 @@ properties:
|
||||||
- qcom,sc7280-cpu-bwmon
|
- qcom,sc7280-cpu-bwmon
|
||||||
- qcom,sc8280xp-cpu-bwmon
|
- qcom,sc8280xp-cpu-bwmon
|
||||||
- qcom,sdm845-bwmon
|
- qcom,sdm845-bwmon
|
||||||
|
- qcom,sm8550-cpu-bwmon
|
||||||
- const: qcom,msm8998-bwmon
|
- const: qcom,msm8998-bwmon
|
||||||
- const: qcom,msm8998-bwmon # BWMON v4
|
- const: qcom,msm8998-bwmon # BWMON v4
|
||||||
- items:
|
- items:
|
||||||
- enum:
|
- enum:
|
||||||
- qcom,sc8280xp-llcc-bwmon
|
- qcom,sc8280xp-llcc-bwmon
|
||||||
|
- qcom,sm8550-llcc-bwmon
|
||||||
- const: qcom,sc7280-llcc-bwmon
|
- const: qcom,sc7280-llcc-bwmon
|
||||||
- const: qcom,sc7280-llcc-bwmon # BWMON v5
|
- const: qcom,sc7280-llcc-bwmon # BWMON v5
|
||||||
- const: qcom,sdm845-llcc-bwmon # BWMON v5
|
- const: qcom,sdm845-llcc-bwmon # BWMON v5
|
||||||
|
|
|
||||||
|
|
@ -22,6 +22,7 @@ properties:
|
||||||
- qcom,sc7180-osm-l3
|
- qcom,sc7180-osm-l3
|
||||||
- qcom,sc8180x-osm-l3
|
- qcom,sc8180x-osm-l3
|
||||||
- qcom,sdm845-osm-l3
|
- qcom,sdm845-osm-l3
|
||||||
|
- qcom,sm6350-osm-l3
|
||||||
- qcom,sm8150-osm-l3
|
- qcom,sm8150-osm-l3
|
||||||
- const: qcom,osm-l3
|
- const: qcom,osm-l3
|
||||||
- items:
|
- items:
|
||||||
|
|
|
||||||
|
|
@ -62,6 +62,37 @@ properties:
|
||||||
power-domains:
|
power-domains:
|
||||||
maxItems: 1
|
maxItems: 1
|
||||||
|
|
||||||
|
# Child node's properties
|
||||||
|
patternProperties:
|
||||||
|
'^interconnect-[a-z0-9]+$':
|
||||||
|
type: object
|
||||||
|
description:
|
||||||
|
snoc-mm is a child of snoc, sharing snoc's register address space.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- qcom,msm8939-snoc-mm
|
||||||
|
|
||||||
|
'#interconnect-cells':
|
||||||
|
const: 1
|
||||||
|
|
||||||
|
clock-names:
|
||||||
|
items:
|
||||||
|
- const: bus
|
||||||
|
- const: bus_a
|
||||||
|
|
||||||
|
clocks:
|
||||||
|
items:
|
||||||
|
- description: Bus Clock
|
||||||
|
- description: Bus A Clock
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- '#interconnect-cells'
|
||||||
|
- clock-names
|
||||||
|
- clocks
|
||||||
|
|
||||||
required:
|
required:
|
||||||
- compatible
|
- compatible
|
||||||
- reg
|
- reg
|
||||||
|
|
@ -108,37 +139,6 @@ allOf:
|
||||||
- description: Bus Clock
|
- description: Bus Clock
|
||||||
- description: Bus A Clock
|
- description: Bus A Clock
|
||||||
|
|
||||||
# Child node's properties
|
|
||||||
patternProperties:
|
|
||||||
'^interconnect-[a-z0-9]+$':
|
|
||||||
type: object
|
|
||||||
description:
|
|
||||||
snoc-mm is a child of snoc, sharing snoc's register address space.
|
|
||||||
|
|
||||||
properties:
|
|
||||||
compatible:
|
|
||||||
enum:
|
|
||||||
- qcom,msm8939-snoc-mm
|
|
||||||
|
|
||||||
'#interconnect-cells':
|
|
||||||
const: 1
|
|
||||||
|
|
||||||
clock-names:
|
|
||||||
items:
|
|
||||||
- const: bus
|
|
||||||
- const: bus_a
|
|
||||||
|
|
||||||
clocks:
|
|
||||||
items:
|
|
||||||
- description: Bus Clock
|
|
||||||
- description: Bus A Clock
|
|
||||||
|
|
||||||
required:
|
|
||||||
- compatible
|
|
||||||
- '#interconnect-cells'
|
|
||||||
- clock-names
|
|
||||||
- clocks
|
|
||||||
|
|
||||||
- if:
|
- if:
|
||||||
properties:
|
properties:
|
||||||
compatible:
|
compatible:
|
||||||
|
|
@ -237,6 +237,17 @@ allOf:
|
||||||
- description: Aggregate2 USB3 AXI Clock.
|
- description: Aggregate2 USB3 AXI Clock.
|
||||||
- description: Config NoC USB2 AXI Clock.
|
- description: Config NoC USB2 AXI Clock.
|
||||||
|
|
||||||
|
- if:
|
||||||
|
not:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,msm8939-snoc
|
||||||
|
then:
|
||||||
|
patternProperties:
|
||||||
|
'^interconnect-[a-z0-9]+$': false
|
||||||
|
|
||||||
examples:
|
examples:
|
||||||
- |
|
- |
|
||||||
#include <dt-bindings/clock/qcom,rpmcc.h>
|
#include <dt-bindings/clock/qcom,rpmcc.h>
|
||||||
|
|
|
||||||
|
|
@ -39,18 +39,6 @@ properties:
|
||||||
- qcom,sc7180-npu-noc
|
- qcom,sc7180-npu-noc
|
||||||
- qcom,sc7180-qup-virt
|
- qcom,sc7180-qup-virt
|
||||||
- qcom,sc7180-system-noc
|
- qcom,sc7180-system-noc
|
||||||
- qcom,sc7280-aggre1-noc
|
|
||||||
- qcom,sc7280-aggre2-noc
|
|
||||||
- qcom,sc7280-clk-virt
|
|
||||||
- qcom,sc7280-cnoc2
|
|
||||||
- qcom,sc7280-cnoc3
|
|
||||||
- qcom,sc7280-dc-noc
|
|
||||||
- qcom,sc7280-gem-noc
|
|
||||||
- qcom,sc7280-lpass-ag-noc
|
|
||||||
- qcom,sc7280-mc-virt
|
|
||||||
- qcom,sc7280-mmss-noc
|
|
||||||
- qcom,sc7280-nsp-noc
|
|
||||||
- qcom,sc7280-system-noc
|
|
||||||
- qcom,sc8180x-aggre1-noc
|
- qcom,sc8180x-aggre1-noc
|
||||||
- qcom,sc8180x-aggre2-noc
|
- qcom,sc8180x-aggre2-noc
|
||||||
- qcom,sc8180x-camnoc-virt
|
- qcom,sc8180x-camnoc-virt
|
||||||
|
|
@ -58,23 +46,18 @@ properties:
|
||||||
- qcom,sc8180x-config-noc
|
- qcom,sc8180x-config-noc
|
||||||
- qcom,sc8180x-dc-noc
|
- qcom,sc8180x-dc-noc
|
||||||
- qcom,sc8180x-gem-noc
|
- qcom,sc8180x-gem-noc
|
||||||
- qcom,sc8180x-ipa-virt
|
|
||||||
- qcom,sc8180x-mc-virt
|
- qcom,sc8180x-mc-virt
|
||||||
- qcom,sc8180x-mmss-noc
|
- qcom,sc8180x-mmss-noc
|
||||||
- qcom,sc8180x-qup-virt
|
- qcom,sc8180x-qup-virt
|
||||||
- qcom,sc8180x-system-noc
|
- qcom,sc8180x-system-noc
|
||||||
- qcom,sc8280xp-aggre1-noc
|
- qcom,sdm670-aggre1-noc
|
||||||
- qcom,sc8280xp-aggre2-noc
|
- qcom,sdm670-aggre2-noc
|
||||||
- qcom,sc8280xp-clk-virt
|
- qcom,sdm670-config-noc
|
||||||
- qcom,sc8280xp-config-noc
|
- qcom,sdm670-dc-noc
|
||||||
- qcom,sc8280xp-dc-noc
|
- qcom,sdm670-gladiator-noc
|
||||||
- qcom,sc8280xp-gem-noc
|
- qcom,sdm670-mem-noc
|
||||||
- qcom,sc8280xp-lpass-ag-noc
|
- qcom,sdm670-mmss-noc
|
||||||
- qcom,sc8280xp-mc-virt
|
- qcom,sdm670-system-noc
|
||||||
- qcom,sc8280xp-mmss-noc
|
|
||||||
- qcom,sc8280xp-nspa-noc
|
|
||||||
- qcom,sc8280xp-nspb-noc
|
|
||||||
- qcom,sc8280xp-system-noc
|
|
||||||
- qcom,sdm845-aggre1-noc
|
- qcom,sdm845-aggre1-noc
|
||||||
- qcom,sdm845-aggre2-noc
|
- qcom,sdm845-aggre2-noc
|
||||||
- qcom,sdm845-config-noc
|
- qcom,sdm845-config-noc
|
||||||
|
|
@ -96,7 +79,6 @@ properties:
|
||||||
- qcom,sm8150-config-noc
|
- qcom,sm8150-config-noc
|
||||||
- qcom,sm8150-dc-noc
|
- qcom,sm8150-dc-noc
|
||||||
- qcom,sm8150-gem-noc
|
- qcom,sm8150-gem-noc
|
||||||
- qcom,sm8150-ipa-virt
|
|
||||||
- qcom,sm8150-mc-virt
|
- qcom,sm8150-mc-virt
|
||||||
- qcom,sm8150-mmss-noc
|
- qcom,sm8150-mmss-noc
|
||||||
- qcom,sm8150-system-noc
|
- qcom,sm8150-system-noc
|
||||||
|
|
@ -106,7 +88,6 @@ properties:
|
||||||
- qcom,sm8250-config-noc
|
- qcom,sm8250-config-noc
|
||||||
- qcom,sm8250-dc-noc
|
- qcom,sm8250-dc-noc
|
||||||
- qcom,sm8250-gem-noc
|
- qcom,sm8250-gem-noc
|
||||||
- qcom,sm8250-ipa-virt
|
|
||||||
- qcom,sm8250-mc-virt
|
- qcom,sm8250-mc-virt
|
||||||
- qcom,sm8250-mmss-noc
|
- qcom,sm8250-mmss-noc
|
||||||
- qcom,sm8250-npu-noc
|
- qcom,sm8250-npu-noc
|
||||||
|
|
@ -121,17 +102,6 @@ properties:
|
||||||
- qcom,sm8350-mmss-noc
|
- qcom,sm8350-mmss-noc
|
||||||
- qcom,sm8350-compute-noc
|
- qcom,sm8350-compute-noc
|
||||||
- qcom,sm8350-system-noc
|
- qcom,sm8350-system-noc
|
||||||
- qcom,sm8450-aggre1-noc
|
|
||||||
- qcom,sm8450-aggre2-noc
|
|
||||||
- qcom,sm8450-clk-virt
|
|
||||||
- qcom,sm8450-config-noc
|
|
||||||
- qcom,sm8450-gem-noc
|
|
||||||
- qcom,sm8450-lpass-ag-noc
|
|
||||||
- qcom,sm8450-mc-virt
|
|
||||||
- qcom,sm8450-mmss-noc
|
|
||||||
- qcom,sm8450-nsp-noc
|
|
||||||
- qcom,sm8450-pcie-anoc
|
|
||||||
- qcom,sm8450-system-noc
|
|
||||||
|
|
||||||
'#interconnect-cells': true
|
'#interconnect-cells': true
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,50 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/interconnect/qcom,sa8775p-rpmh.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Qualcomm RPMh Network-On-Chip Interconnect on SA8775P
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
RPMh interconnect providers support system bandwidth requirements through
|
||||||
|
RPMh hardware accelerators known as Bus Clock Manager (BCM).
|
||||||
|
|
||||||
|
See also:: include/dt-bindings/interconnect/qcom,sa8775p.h
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- qcom,sa8775p-aggre1-noc
|
||||||
|
- qcom,sa8775p-aggre2-noc
|
||||||
|
- qcom,sa8775p-clk-virt
|
||||||
|
- qcom,sa8775p-config-noc
|
||||||
|
- qcom,sa8775p-dc-noc
|
||||||
|
- qcom,sa8775p-gem-noc
|
||||||
|
- qcom,sa8775p-gpdsp-anoc
|
||||||
|
- qcom,sa8775p-lpass-ag-noc
|
||||||
|
- qcom,sa8775p-mc-virt
|
||||||
|
- qcom,sa8775p-mmss-noc
|
||||||
|
- qcom,sa8775p-nspa-noc
|
||||||
|
- qcom,sa8775p-nspb-noc
|
||||||
|
- qcom,sa8775p-pcie-anoc
|
||||||
|
- qcom,sa8775p-system-noc
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: qcom,rpmh-common.yaml#
|
||||||
|
|
||||||
|
unevaluatedProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
aggre1_noc: interconnect-aggre1-noc {
|
||||||
|
compatible = "qcom,sa8775p-aggre1-noc";
|
||||||
|
#interconnect-cells = <2>;
|
||||||
|
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,71 @@
|
||||||
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/interconnect/qcom,sc7280-rpmh.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Qualcomm RPMh Network-On-Chip Interconnect on SC7280
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Bjorn Andersson <andersson@kernel.org>
|
||||||
|
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
RPMh interconnect providers support system bandwidth requirements through
|
||||||
|
RPMh hardware accelerators known as Bus Clock Manager (BCM).
|
||||||
|
|
||||||
|
See also:: include/dt-bindings/interconnect/qcom,sc7280.h
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- qcom,sc7280-aggre1-noc
|
||||||
|
- qcom,sc7280-aggre2-noc
|
||||||
|
- qcom,sc7280-clk-virt
|
||||||
|
- qcom,sc7280-cnoc2
|
||||||
|
- qcom,sc7280-cnoc3
|
||||||
|
- qcom,sc7280-dc-noc
|
||||||
|
- qcom,sc7280-gem-noc
|
||||||
|
- qcom,sc7280-lpass-ag-noc
|
||||||
|
- qcom,sc7280-mc-virt
|
||||||
|
- qcom,sc7280-mmss-noc
|
||||||
|
- qcom,sc7280-nsp-noc
|
||||||
|
- qcom,sc7280-system-noc
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: qcom,rpmh-common.yaml#
|
||||||
|
- if:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,sc7280-clk-virt
|
||||||
|
then:
|
||||||
|
properties:
|
||||||
|
reg: false
|
||||||
|
else:
|
||||||
|
required:
|
||||||
|
- reg
|
||||||
|
|
||||||
|
unevaluatedProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
interconnect {
|
||||||
|
compatible = "qcom,sc7280-clk-virt";
|
||||||
|
#interconnect-cells = <2>;
|
||||||
|
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||||
|
};
|
||||||
|
|
||||||
|
interconnect@9100000 {
|
||||||
|
reg = <0x9100000 0xe2200>;
|
||||||
|
compatible = "qcom,sc7280-gem-noc";
|
||||||
|
#interconnect-cells = <2>;
|
||||||
|
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,49 @@
|
||||||
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/interconnect/qcom,sc8280xp-rpmh.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Qualcomm RPMh Network-On-Chip Interconnect on SC8280XP
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Bjorn Andersson <andersson@kernel.org>
|
||||||
|
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
RPMh interconnect providers support system bandwidth requirements through
|
||||||
|
RPMh hardware accelerators known as Bus Clock Manager (BCM).
|
||||||
|
|
||||||
|
See also:: include/dt-bindings/interconnect/qcom,sc8280xp.h
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- qcom,sc8280xp-aggre1-noc
|
||||||
|
- qcom,sc8280xp-aggre2-noc
|
||||||
|
- qcom,sc8280xp-clk-virt
|
||||||
|
- qcom,sc8280xp-config-noc
|
||||||
|
- qcom,sc8280xp-dc-noc
|
||||||
|
- qcom,sc8280xp-gem-noc
|
||||||
|
- qcom,sc8280xp-lpass-ag-noc
|
||||||
|
- qcom,sc8280xp-mc-virt
|
||||||
|
- qcom,sc8280xp-mmss-noc
|
||||||
|
- qcom,sc8280xp-nspa-noc
|
||||||
|
- qcom,sc8280xp-nspb-noc
|
||||||
|
- qcom,sc8280xp-system-noc
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: qcom,rpmh-common.yaml#
|
||||||
|
|
||||||
|
unevaluatedProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
interconnect-0 {
|
||||||
|
compatible = "qcom,sc8280xp-aggre1-noc";
|
||||||
|
#interconnect-cells = <2>;
|
||||||
|
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,124 @@
|
||||||
|
# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/interconnect/qcom,sm8450-rpmh.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Qualcomm RPMh Network-On-Chip Interconnect on SM8450
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Bjorn Andersson <andersson@kernel.org>
|
||||||
|
- Konrad Dybcio <konrad.dybcio@linaro.org>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
RPMh interconnect providers support system bandwidth requirements through
|
||||||
|
RPMh hardware accelerators known as Bus Clock Manager (BCM).
|
||||||
|
|
||||||
|
See also:: include/dt-bindings/interconnect/qcom,sm8450.h
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- qcom,sm8450-aggre1-noc
|
||||||
|
- qcom,sm8450-aggre2-noc
|
||||||
|
- qcom,sm8450-clk-virt
|
||||||
|
- qcom,sm8450-config-noc
|
||||||
|
- qcom,sm8450-gem-noc
|
||||||
|
- qcom,sm8450-lpass-ag-noc
|
||||||
|
- qcom,sm8450-mc-virt
|
||||||
|
- qcom,sm8450-mmss-noc
|
||||||
|
- qcom,sm8450-nsp-noc
|
||||||
|
- qcom,sm8450-pcie-anoc
|
||||||
|
- qcom,sm8450-system-noc
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
clocks:
|
||||||
|
minItems: 1
|
||||||
|
maxItems: 4
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
|
||||||
|
allOf:
|
||||||
|
- $ref: qcom,rpmh-common.yaml#
|
||||||
|
- if:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,sm8450-clk-virt
|
||||||
|
- qcom,sm8450-mc-virt
|
||||||
|
then:
|
||||||
|
properties:
|
||||||
|
reg: false
|
||||||
|
else:
|
||||||
|
required:
|
||||||
|
- reg
|
||||||
|
|
||||||
|
- if:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,sm8450-aggre1-noc
|
||||||
|
then:
|
||||||
|
properties:
|
||||||
|
clocks:
|
||||||
|
items:
|
||||||
|
- description: aggre UFS PHY AXI clock
|
||||||
|
- description: aggre USB3 PRIM AXI clock
|
||||||
|
|
||||||
|
- if:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,sm8450-aggre2-noc
|
||||||
|
then:
|
||||||
|
properties:
|
||||||
|
clocks:
|
||||||
|
items:
|
||||||
|
- description: aggre-NOC PCIe 0 AXI clock
|
||||||
|
- description: aggre-NOC PCIe 1 AXI clock
|
||||||
|
- description: aggre UFS PHY AXI clock
|
||||||
|
- description: RPMH CC IPA clock
|
||||||
|
|
||||||
|
- if:
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
contains:
|
||||||
|
enum:
|
||||||
|
- qcom,sm8450-aggre1-noc
|
||||||
|
- qcom,sm8450-aggre2-noc
|
||||||
|
then:
|
||||||
|
required:
|
||||||
|
- clocks
|
||||||
|
else:
|
||||||
|
properties:
|
||||||
|
clocks: false
|
||||||
|
|
||||||
|
unevaluatedProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
#include <dt-bindings/clock/qcom,gcc-sm8450.h>
|
||||||
|
#include <dt-bindings/clock/qcom,rpmh.h>
|
||||||
|
|
||||||
|
interconnect-0 {
|
||||||
|
compatible = "qcom,sm8450-clk-virt";
|
||||||
|
#interconnect-cells = <2>;
|
||||||
|
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||||
|
};
|
||||||
|
|
||||||
|
interconnect@1700000 {
|
||||||
|
compatible = "qcom,sm8450-aggre2-noc";
|
||||||
|
reg = <0x01700000 0x31080>;
|
||||||
|
#interconnect-cells = <2>;
|
||||||
|
qcom,bcm-voters = <&apps_bcm_voter>;
|
||||||
|
clocks = <&gcc GCC_AGGRE_NOC_PCIE_0_AXI_CLK>,
|
||||||
|
<&gcc GCC_AGGRE_NOC_PCIE_1_AXI_CLK>,
|
||||||
|
<&gcc GCC_AGGRE_UFS_PHY_AXI_CLK>,
|
||||||
|
<&rpmhcc RPMH_IPA_CLK>;
|
||||||
|
};
|
||||||
|
|
@ -196,6 +196,8 @@ properties:
|
||||||
maxItems: 2
|
maxItems: 2
|
||||||
|
|
||||||
operating-points-v2: true
|
operating-points-v2: true
|
||||||
|
opp-table:
|
||||||
|
type: object
|
||||||
|
|
||||||
samsung,data-clock-ratio:
|
samsung,data-clock-ratio:
|
||||||
$ref: /schemas/types.yaml#/definitions/uint32
|
$ref: /schemas/types.yaml#/definitions/uint32
|
||||||
|
|
@ -227,6 +229,31 @@ examples:
|
||||||
operating-points-v2 = <&bus_dmc_opp_table>;
|
operating-points-v2 = <&bus_dmc_opp_table>;
|
||||||
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
|
devfreq-events = <&ppmu_dmc0_3>, <&ppmu_dmc1_3>;
|
||||||
vdd-supply = <&buck1_reg>;
|
vdd-supply = <&buck1_reg>;
|
||||||
|
|
||||||
|
bus_dmc_opp_table: opp-table {
|
||||||
|
compatible = "operating-points-v2";
|
||||||
|
|
||||||
|
opp-50000000 {
|
||||||
|
opp-hz = /bits/ 64 <50000000>;
|
||||||
|
opp-microvolt = <800000>;
|
||||||
|
};
|
||||||
|
opp-100000000 {
|
||||||
|
opp-hz = /bits/ 64 <100000000>;
|
||||||
|
opp-microvolt = <800000>;
|
||||||
|
};
|
||||||
|
opp-134000000 {
|
||||||
|
opp-hz = /bits/ 64 <134000000>;
|
||||||
|
opp-microvolt = <800000>;
|
||||||
|
};
|
||||||
|
opp-200000000 {
|
||||||
|
opp-hz = /bits/ 64 <200000000>;
|
||||||
|
opp-microvolt = <825000>;
|
||||||
|
};
|
||||||
|
opp-400000000 {
|
||||||
|
opp-hz = /bits/ 64 <400000000>;
|
||||||
|
opp-microvolt = <875000>;
|
||||||
|
};
|
||||||
|
};
|
||||||
};
|
};
|
||||||
|
|
||||||
ppmu_dmc0: ppmu@106a0000 {
|
ppmu_dmc0: ppmu@106a0000 {
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,47 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/misc/xlnx,tmr-inject.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Xilinx Triple Modular Redundancy(TMR) Inject IP
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
The Triple Modular Redundancy(TMR) Inject core provides functional fault
|
||||||
|
injection by changing selected MicroBlaze instructions, which provides the
|
||||||
|
possibility to verify that the TMR subsystem error detection and fault
|
||||||
|
recovery logic is working properly.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- xlnx,tmr-inject-1.0
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
xlnx,magic:
|
||||||
|
minimum: 0
|
||||||
|
maximum: 255
|
||||||
|
description: |
|
||||||
|
Magic number, When configured it allows the controller to perform
|
||||||
|
recovery.
|
||||||
|
$ref: /schemas/types.yaml#/definitions/uint32
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- xlnx,magic
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
fault-inject@44a30000 {
|
||||||
|
compatible = "xlnx,tmr-inject-1.0";
|
||||||
|
reg = <0x44a10000 0x10000>;
|
||||||
|
xlnx,magic = <0x46>;
|
||||||
|
};
|
||||||
|
|
@ -0,0 +1,47 @@
|
||||||
|
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
|
||||||
|
%YAML 1.2
|
||||||
|
---
|
||||||
|
$id: http://devicetree.org/schemas/misc/xlnx,tmr-manager.yaml#
|
||||||
|
$schema: http://devicetree.org/meta-schemas/core.yaml#
|
||||||
|
|
||||||
|
title: Xilinx Triple Modular Redundancy(TMR) Manager IP
|
||||||
|
|
||||||
|
maintainers:
|
||||||
|
- Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
|
||||||
|
|
||||||
|
description: |
|
||||||
|
The Triple Modular Redundancy(TMR) Manager is responsible for handling the
|
||||||
|
TMR subsystem state, including fault detection and error recovery. The core
|
||||||
|
is triplicated in each of the sub-blocks in the TMR subsystem, and provides
|
||||||
|
majority voting of its internal state.
|
||||||
|
|
||||||
|
properties:
|
||||||
|
compatible:
|
||||||
|
enum:
|
||||||
|
- xlnx,tmr-manager-1.0
|
||||||
|
|
||||||
|
reg:
|
||||||
|
maxItems: 1
|
||||||
|
|
||||||
|
xlnx,magic1:
|
||||||
|
minimum: 0
|
||||||
|
maximum: 255
|
||||||
|
description:
|
||||||
|
Magic byte 1, When configured it allows the controller to perform
|
||||||
|
recovery.
|
||||||
|
$ref: /schemas/types.yaml#/definitions/uint32
|
||||||
|
|
||||||
|
required:
|
||||||
|
- compatible
|
||||||
|
- reg
|
||||||
|
- xlnx,magic1
|
||||||
|
|
||||||
|
additionalProperties: false
|
||||||
|
|
||||||
|
examples:
|
||||||
|
- |
|
||||||
|
tmr-manager@44a10000 {
|
||||||
|
compatible = "xlnx,tmr-manager-1.0";
|
||||||
|
reg = <0x44a10000 0x10000>;
|
||||||
|
xlnx,magic1 = <0x46>;
|
||||||
|
};
|
||||||
|
|
@ -19,16 +19,21 @@ properties:
|
||||||
- qcom,apq8064-qfprom
|
- qcom,apq8064-qfprom
|
||||||
- qcom,apq8084-qfprom
|
- qcom,apq8084-qfprom
|
||||||
- qcom,ipq8064-qfprom
|
- qcom,ipq8064-qfprom
|
||||||
- qcom,msm8974-qfprom
|
- qcom,ipq8074-qfprom
|
||||||
- qcom,msm8916-qfprom
|
- qcom,msm8916-qfprom
|
||||||
|
- qcom,msm8974-qfprom
|
||||||
|
- qcom,msm8976-qfprom
|
||||||
- qcom,msm8996-qfprom
|
- qcom,msm8996-qfprom
|
||||||
- qcom,msm8998-qfprom
|
- qcom,msm8998-qfprom
|
||||||
- qcom,qcs404-qfprom
|
- qcom,qcs404-qfprom
|
||||||
- qcom,sc7180-qfprom
|
- qcom,sc7180-qfprom
|
||||||
- qcom,sc7280-qfprom
|
- qcom,sc7280-qfprom
|
||||||
- qcom,sdm630-qfprom
|
- qcom,sdm630-qfprom
|
||||||
|
- qcom,sdm670-qfprom
|
||||||
- qcom,sdm845-qfprom
|
- qcom,sdm845-qfprom
|
||||||
- qcom,sm6115-qfprom
|
- qcom,sm6115-qfprom
|
||||||
|
- qcom,sm8150-qfprom
|
||||||
|
- qcom,sm8250-qfprom
|
||||||
- const: qcom,qfprom
|
- const: qcom,qfprom
|
||||||
|
|
||||||
reg:
|
reg:
|
||||||
|
|
|
||||||
|
|
@ -278,6 +278,13 @@ To get all available archs you can also specify all. E.g.::
|
||||||
|
|
||||||
$ make ALLSOURCE_ARCHS=all tags
|
$ make ALLSOURCE_ARCHS=all tags
|
||||||
|
|
||||||
|
IGNORE_DIRS
|
||||||
|
-----------
|
||||||
|
For tags/TAGS/cscope targets, you can choose which directories won't
|
||||||
|
be included in the databases, separated by blank space. E.g.::
|
||||||
|
|
||||||
|
$ make IGNORE_DIRS="drivers/gpu/drm/radeon tools" cscope
|
||||||
|
|
||||||
KBUILD_BUILD_TIMESTAMP
|
KBUILD_BUILD_TIMESTAMP
|
||||||
----------------------
|
----------------------
|
||||||
Setting this to a date string overrides the timestamp used in the
|
Setting this to a date string overrides the timestamp used in the
|
||||||
|
|
|
||||||
|
|
@ -0,0 +1,52 @@
|
||||||
|
.. SPDX-License-Identifier: GPL-2.0
|
||||||
|
|
||||||
|
=================================================================
|
||||||
|
The trace performance monitoring and diagnostics aggregator(TPDA)
|
||||||
|
=================================================================
|
||||||
|
|
||||||
|
:Author: Jinlong Mao <quic_jinlmao@quicinc.com>
|
||||||
|
:Date: January 2023
|
||||||
|
|
||||||
|
Hardware Description
|
||||||
|
--------------------
|
||||||
|
|
||||||
|
TPDA - The trace performance monitoring and diagnostics aggregator or
|
||||||
|
TPDA in short serves as an arbitration and packetization engine for the
|
||||||
|
performance monitoring and diagnostics network specification.
|
||||||
|
The primary use case of the TPDA is to provide packetization, funneling
|
||||||
|
and timestamping of Monitor data.
|
||||||
|
|
||||||
|
|
||||||
|
Sysfs files and directories
|
||||||
|
---------------------------
|
||||||
|
Root: ``/sys/bus/coresight/devices/tpda<N>``
|
||||||
|
|
||||||
|
Config details
|
||||||
|
---------------------------
|
||||||
|
|
||||||
|
The tpdm and tpda nodes should be observed at the coresight path
|
||||||
|
"/sys/bus/coresight/devices".
|
||||||
|
e.g.
|
||||||
|
/sys/bus/coresight/devices # ls -l | grep tpd
|
||||||
|
tpda0 -> ../../../devices/platform/soc@0/6004000.tpda/tpda0
|
||||||
|
tpdm0 -> ../../../devices/platform/soc@0/6c08000.mm.tpdm/tpdm0
|
||||||
|
|
||||||
|
We can use the commands are similar to the below to validate TPDMs.
|
||||||
|
Enable coresight sink first. The port of tpda which is connected to
|
||||||
|
the tpdm will be enabled after commands below.
|
||||||
|
|
||||||
|
echo 1 > /sys/bus/coresight/devices/tmc_etf0/enable_sink
|
||||||
|
echo 1 > /sys/bus/coresight/devices/tpdm0/enable_source
|
||||||
|
echo 1 > /sys/bus/coresight/devices/tpdm0/integration_test
|
||||||
|
echo 2 > /sys/bus/coresight/devices/tpdm0/integration_test
|
||||||
|
|
||||||
|
The test data will be collected in the coresight sink which is enabled.
|
||||||
|
If rwp register of the sink is keeping updating when do
|
||||||
|
integration_test (by cat tmc_etf0/mgmt/rwp), it means there is data
|
||||||
|
generated from TPDM to sink.
|
||||||
|
|
||||||
|
There must be a tpda between tpdm and the sink. When there are some
|
||||||
|
other trace event hw components in the same HW block with tpdm, tpdm
|
||||||
|
and these hw components will connect to the coresight funnel. When
|
||||||
|
there is only tpdm trace hw in the HW block, tpdm will connect to
|
||||||
|
tpda directly.
|
||||||
|
|
@ -0,0 +1,45 @@
|
||||||
|
.. SPDX-License-Identifier: GPL-2.0
|
||||||
|
|
||||||
|
==========================================================
|
||||||
|
Trace performance monitoring and diagnostics monitor(TPDM)
|
||||||
|
==========================================================
|
||||||
|
|
||||||
|
:Author: Jinlong Mao <quic_jinlmao@quicinc.com>
|
||||||
|
:Date: January 2023
|
||||||
|
|
||||||
|
Hardware Description
|
||||||
|
--------------------
|
||||||
|
TPDM - The trace performance monitoring and diagnostics monitor or TPDM in
|
||||||
|
short serves as data collection component for various dataset types.
|
||||||
|
The primary use case of the TPDM is to collect data from different data
|
||||||
|
sources and send it to a TPDA for packetization, timestamping and funneling.
|
||||||
|
|
||||||
|
Sysfs files and directories
|
||||||
|
---------------------------
|
||||||
|
Root: ``/sys/bus/coresight/devices/tpdm<N>``
|
||||||
|
|
||||||
|
----
|
||||||
|
|
||||||
|
:File: ``enable_source`` (RW)
|
||||||
|
:Notes:
|
||||||
|
- > 0 : enable the datasets of TPDM.
|
||||||
|
|
||||||
|
- = 0 : disable the datasets of TPDM.
|
||||||
|
|
||||||
|
:Syntax:
|
||||||
|
``echo 1 > enable_source``
|
||||||
|
|
||||||
|
----
|
||||||
|
|
||||||
|
:File: ``integration_test`` (wo)
|
||||||
|
:Notes:
|
||||||
|
Integration test will generate test data for tpdm.
|
||||||
|
|
||||||
|
:Syntax:
|
||||||
|
``echo value > integration_test``
|
||||||
|
|
||||||
|
value - 1 or 2.
|
||||||
|
|
||||||
|
----
|
||||||
|
|
||||||
|
.. This text is intentionally added to make Sphinx happy.
|
||||||
|
|
@ -0,0 +1,83 @@
|
||||||
|
.. SPDX-License-Identifier: GPL-2.0
|
||||||
|
|
||||||
|
======================================
|
||||||
|
UltraSoc - HW Assisted Tracing on SoC
|
||||||
|
======================================
|
||||||
|
:Author: Qi Liu <liuqi115@huawei.com>
|
||||||
|
:Date: January 2023
|
||||||
|
|
||||||
|
Introduction
|
||||||
|
------------
|
||||||
|
|
||||||
|
UltraSoc SMB is a per SCCL (Super CPU Cluster) hardware. It provides a
|
||||||
|
way to buffer and store CPU trace messages in a region of shared system
|
||||||
|
memory. The device acts as a coresight sink device and the
|
||||||
|
corresponding trace generators (ETM) are attached as source devices.
|
||||||
|
|
||||||
|
Sysfs files and directories
|
||||||
|
---------------------------
|
||||||
|
|
||||||
|
The SMB devices appear on the existing coresight bus alongside other
|
||||||
|
devices::
|
||||||
|
|
||||||
|
$# ls /sys/bus/coresight/devices/
|
||||||
|
ultra_smb0 ultra_smb1 ultra_smb2 ultra_smb3
|
||||||
|
|
||||||
|
The ``ultra_smb<N>`` names SMB device associated with SCCL.::
|
||||||
|
|
||||||
|
$# ls /sys/bus/coresight/devices/ultra_smb0
|
||||||
|
enable_sink mgmt
|
||||||
|
$# ls /sys/bus/coresight/devices/ultra_smb0/mgmt
|
||||||
|
buf_size buf_status read_pos write_pos
|
||||||
|
|
||||||
|
Key file items are:
|
||||||
|
|
||||||
|
* ``read_pos``: Shows the value on the read pointer register.
|
||||||
|
* ``write_pos``: Shows the value on the write pointer register.
|
||||||
|
* ``buf_status``: Shows the value on the status register.
|
||||||
|
BIT(0) is zero value which means the buffer is empty.
|
||||||
|
* ``buf_size``: Shows the buffer size of each device.
|
||||||
|
|
||||||
|
Firmware Bindings
|
||||||
|
-----------------
|
||||||
|
|
||||||
|
The device is only supported with ACPI. Its binding describes device
|
||||||
|
identifier, resource information and graph structure.
|
||||||
|
|
||||||
|
The device is identified as ACPI HID "HISI03A1". Device resources are allocated
|
||||||
|
using the _CRS method. Each device must present two base address; the first one
|
||||||
|
is the configuration base address of the device, the second one is the 32-bit
|
||||||
|
base address of shared system memory.
|
||||||
|
|
||||||
|
Example::
|
||||||
|
|
||||||
|
Device(USMB) { \
|
||||||
|
Name(_HID, "HISI03A1") \
|
||||||
|
Name(_CRS, ResourceTemplate() { \
|
||||||
|
QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, NonCacheable, \
|
||||||
|
ReadWrite, 0x0, 0x95100000, 0x951FFFFF, 0x0, 0x100000) \
|
||||||
|
QWordMemory (ResourceConsumer, , MinFixed, MaxFixed, Cacheable, \
|
||||||
|
ReadWrite, 0x0, 0x50000000, 0x53FFFFFF, 0x0, 0x4000000) \
|
||||||
|
}) \
|
||||||
|
Name(_DSD, Package() { \
|
||||||
|
ToUUID("ab02a46b-74c7-45a2-bd68-f7d344ef2153"), \
|
||||||
|
/* Use CoreSight Graph ACPI bindings to describe connections topology */
|
||||||
|
Package() { \
|
||||||
|
0, \
|
||||||
|
1, \
|
||||||
|
Package() { \
|
||||||
|
1, \
|
||||||
|
ToUUID("3ecbc8b6-1d0e-4fb3-8107-e627f805c6cd"), \
|
||||||
|
8, \
|
||||||
|
Package() {0x8, 0, \_SB.S00.SL11.CL28.F008, 0}, \
|
||||||
|
Package() {0x9, 0, \_SB.S00.SL11.CL29.F009, 0}, \
|
||||||
|
Package() {0xa, 0, \_SB.S00.SL11.CL2A.F010, 0}, \
|
||||||
|
Package() {0xb, 0, \_SB.S00.SL11.CL2B.F011, 0}, \
|
||||||
|
Package() {0xc, 0, \_SB.S00.SL11.CL2C.F012, 0}, \
|
||||||
|
Package() {0xd, 0, \_SB.S00.SL11.CL2D.F013, 0}, \
|
||||||
|
Package() {0xe, 0, \_SB.S00.SL11.CL2E.F014, 0}, \
|
||||||
|
Package() {0xf, 0, \_SB.S00.SL11.CL2F.F015, 0}, \
|
||||||
|
} \
|
||||||
|
} \
|
||||||
|
}) \
|
||||||
|
}
|
||||||
48
MAINTAINERS
48
MAINTAINERS
|
|
@ -2071,8 +2071,10 @@ M: Hartley Sweeten <hsweeten@visionengravers.com>
|
||||||
M: Alexander Sverdlin <alexander.sverdlin@gmail.com>
|
M: Alexander Sverdlin <alexander.sverdlin@gmail.com>
|
||||||
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
|
||||||
S: Maintained
|
S: Maintained
|
||||||
|
F: Documentation/devicetree/bindings/iio/adc/cirrus,ep9301-adc.yaml
|
||||||
F: arch/arm/boot/compressed/misc-ep93xx.h
|
F: arch/arm/boot/compressed/misc-ep93xx.h
|
||||||
F: arch/arm/mach-ep93xx/
|
F: arch/arm/mach-ep93xx/
|
||||||
|
F: drivers/iio/adc/ep93xx_adc.c
|
||||||
|
|
||||||
ARM/CLKDEV SUPPORT
|
ARM/CLKDEV SUPPORT
|
||||||
M: Russell King <linux@armlinux.org.uk>
|
M: Russell King <linux@armlinux.org.uk>
|
||||||
|
|
@ -2099,6 +2101,7 @@ S: Maintained
|
||||||
T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
|
T: git git://git.kernel.org/pub/scm/linux/kernel/git/coresight/linux.git
|
||||||
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
|
F: Documentation/ABI/testing/sysfs-bus-coresight-devices-*
|
||||||
F: Documentation/devicetree/bindings/arm/arm,coresight-*.yaml
|
F: Documentation/devicetree/bindings/arm/arm,coresight-*.yaml
|
||||||
|
F: Documentation/devicetree/bindings/arm/qcom,coresight-*.yaml
|
||||||
F: Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml
|
F: Documentation/devicetree/bindings/arm/arm,embedded-trace-extension.yaml
|
||||||
F: Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml
|
F: Documentation/devicetree/bindings/arm/arm,trace-buffer-extension.yaml
|
||||||
F: Documentation/trace/coresight/*
|
F: Documentation/trace/coresight/*
|
||||||
|
|
@ -9254,11 +9257,15 @@ F: drivers/perf/hisilicon/hns3_pmu.c
|
||||||
|
|
||||||
HISILICON PTT DRIVER
|
HISILICON PTT DRIVER
|
||||||
M: Yicong Yang <yangyicong@hisilicon.com>
|
M: Yicong Yang <yangyicong@hisilicon.com>
|
||||||
|
M: Jonathan Cameron <jonathan.cameron@huawei.com>
|
||||||
L: linux-kernel@vger.kernel.org
|
L: linux-kernel@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/ABI/testing/sysfs-devices-hisi_ptt
|
F: Documentation/ABI/testing/sysfs-devices-hisi_ptt
|
||||||
F: Documentation/trace/hisi-ptt.rst
|
F: Documentation/trace/hisi-ptt.rst
|
||||||
F: drivers/hwtracing/ptt/
|
F: drivers/hwtracing/ptt/
|
||||||
|
F: tools/perf/arch/arm64/util/hisi-ptt.c
|
||||||
|
F: tools/perf/util/hisi-ptt*
|
||||||
|
F: tools/perf/util/hisi-ptt-decoder/*
|
||||||
|
|
||||||
HISILICON QM DRIVER
|
HISILICON QM DRIVER
|
||||||
M: Weili Qian <qianweili@huawei.com>
|
M: Weili Qian <qianweili@huawei.com>
|
||||||
|
|
@ -10454,6 +10461,7 @@ F: drivers/watchdog/mei_wdt.c
|
||||||
F: include/linux/mei_aux.h
|
F: include/linux/mei_aux.h
|
||||||
F: include/linux/mei_cl_bus.h
|
F: include/linux/mei_cl_bus.h
|
||||||
F: include/uapi/linux/mei.h
|
F: include/uapi/linux/mei.h
|
||||||
|
F: include/uapi/linux/uuid.h
|
||||||
F: samples/mei/*
|
F: samples/mei/*
|
||||||
|
|
||||||
INTEL MAX 10 BMC MFD DRIVER
|
INTEL MAX 10 BMC MFD DRIVER
|
||||||
|
|
@ -13528,6 +13536,19 @@ W: http://www.monstr.eu/fdt/
|
||||||
T: git git://git.monstr.eu/linux-2.6-microblaze.git
|
T: git git://git.monstr.eu/linux-2.6-microblaze.git
|
||||||
F: arch/microblaze/
|
F: arch/microblaze/
|
||||||
|
|
||||||
|
MICROBLAZE TMR MANAGER
|
||||||
|
M: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
|
||||||
|
S: Supported
|
||||||
|
F: Documentation/ABI/testing/sysfs-driver-xilinx-tmr-manager
|
||||||
|
F: Documentation/devicetree/bindings/misc/xlnx,tmr-manager.yaml
|
||||||
|
F: drivers/misc/xilinx_tmr_manager.c
|
||||||
|
|
||||||
|
MICROBLAZE TMR INJECT
|
||||||
|
M: Appana Durga Kedareswara rao <appana.durga.kedareswara.rao@amd.com>
|
||||||
|
S: Supported
|
||||||
|
F: Documentation/devicetree/bindings/misc/xlnx,tmr-inject.yaml
|
||||||
|
F: drivers/misc/xilinx_tmr_inject.c
|
||||||
|
|
||||||
MICROCHIP AT91 DMA DRIVERS
|
MICROCHIP AT91 DMA DRIVERS
|
||||||
M: Ludovic Desroches <ludovic.desroches@microchip.com>
|
M: Ludovic Desroches <ludovic.desroches@microchip.com>
|
||||||
M: Tudor Ambarus <tudor.ambarus@linaro.org>
|
M: Tudor Ambarus <tudor.ambarus@linaro.org>
|
||||||
|
|
@ -14953,14 +14974,16 @@ S: Maintained
|
||||||
F: Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
|
F: Documentation/devicetree/bindings/iio/adc/nxp,imx8qxp-adc.yaml
|
||||||
F: drivers/iio/adc/imx8qxp-adc.c
|
F: drivers/iio/adc/imx8qxp-adc.c
|
||||||
|
|
||||||
NXP i.MX 7D/6SX/6UL AND VF610 ADC DRIVER
|
NXP i.MX 7D/6SX/6UL/93 AND VF610 ADC DRIVER
|
||||||
M: Haibo Chen <haibo.chen@nxp.com>
|
M: Haibo Chen <haibo.chen@nxp.com>
|
||||||
L: linux-iio@vger.kernel.org
|
L: linux-iio@vger.kernel.org
|
||||||
L: linux-imx@nxp.com
|
L: linux-imx@nxp.com
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml
|
F: Documentation/devicetree/bindings/iio/adc/fsl,imx7d-adc.yaml
|
||||||
F: Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml
|
F: Documentation/devicetree/bindings/iio/adc/fsl,vf610-adc.yaml
|
||||||
|
F: Documentation/devicetree/bindings/iio/adc/nxp,imx93-adc.yaml
|
||||||
F: drivers/iio/adc/imx7d_adc.c
|
F: drivers/iio/adc/imx7d_adc.c
|
||||||
|
F: drivers/iio/adc/imx93_adc.c
|
||||||
F: drivers/iio/adc/vf610_adc.c
|
F: drivers/iio/adc/vf610_adc.c
|
||||||
|
|
||||||
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
|
NXP PF8100/PF8121A/PF8200 PMIC REGULATOR DEVICE DRIVER
|
||||||
|
|
@ -20756,6 +20779,13 @@ M: Robert Richter <rric@kernel.org>
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: drivers/gpio/gpio-thunderx.c
|
F: drivers/gpio/gpio-thunderx.c
|
||||||
|
|
||||||
|
TI ADS7924 ADC DRIVER
|
||||||
|
M: Hugo Villeneuve <hvilleneuve@dimonoff.com>
|
||||||
|
L: linux-iio@vger.kernel.org
|
||||||
|
S: Supported
|
||||||
|
F: Documentation/devicetree/bindings/iio/adc/ti,ads7924.yaml
|
||||||
|
F: drivers/iio/adc/ti-ads7924.c
|
||||||
|
|
||||||
TI AM437X VPFE DRIVER
|
TI AM437X VPFE DRIVER
|
||||||
M: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
|
M: "Lad, Prabhakar" <prabhakar.csengg@gmail.com>
|
||||||
L: linux-media@vger.kernel.org
|
L: linux-media@vger.kernel.org
|
||||||
|
|
@ -20875,6 +20905,14 @@ S: Maintained
|
||||||
F: sound/soc/codecs/isabelle*
|
F: sound/soc/codecs/isabelle*
|
||||||
F: sound/soc/codecs/lm49453*
|
F: sound/soc/codecs/lm49453*
|
||||||
|
|
||||||
|
TI LMP92064 ADC DRIVER
|
||||||
|
M: Leonard Göhrs <l.goehrs@pengutronix.de>
|
||||||
|
R: kernel@pengutronix.de
|
||||||
|
L: linux-iio@vger.kernel.org
|
||||||
|
S: Maintained
|
||||||
|
F: Documentation/devicetree/bindings/iio/adc/ti,lmp92064.yaml
|
||||||
|
F: drivers/iio/adc/ti-lmp92064.c
|
||||||
|
|
||||||
TI PCM3060 ASoC CODEC DRIVER
|
TI PCM3060 ASoC CODEC DRIVER
|
||||||
M: Kirill Marinushkin <kmarinushkin@birdec.com>
|
M: Kirill Marinushkin <kmarinushkin@birdec.com>
|
||||||
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||||
|
|
@ -20888,6 +20926,13 @@ L: alsa-devel@alsa-project.org (moderated for non-subscribers)
|
||||||
S: Odd Fixes
|
S: Odd Fixes
|
||||||
F: sound/soc/codecs/tas571x*
|
F: sound/soc/codecs/tas571x*
|
||||||
|
|
||||||
|
TI TMAG5273 MAGNETOMETER DRIVER
|
||||||
|
M: Gerald Loacker <gerald.loacker@wolfvision.net>
|
||||||
|
L: linux-iio@vger.kernel.org
|
||||||
|
S: Maintained
|
||||||
|
F: Documentation/devicetree/bindings/iio/magnetometer/ti,tmag5273.yaml
|
||||||
|
F: drivers/iio/magnetometer/tmag5273.c
|
||||||
|
|
||||||
TI TRF7970A NFC DRIVER
|
TI TRF7970A NFC DRIVER
|
||||||
M: Mark Greer <mgreer@animalcreek.com>
|
M: Mark Greer <mgreer@animalcreek.com>
|
||||||
L: linux-wireless@vger.kernel.org
|
L: linux-wireless@vger.kernel.org
|
||||||
|
|
@ -21789,7 +21834,6 @@ R: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
|
||||||
L: linux-kernel@vger.kernel.org
|
L: linux-kernel@vger.kernel.org
|
||||||
S: Maintained
|
S: Maintained
|
||||||
F: include/linux/uuid.h
|
F: include/linux/uuid.h
|
||||||
F: include/uapi/linux/uuid.h
|
|
||||||
F: lib/test_uuid.c
|
F: lib/test_uuid.c
|
||||||
F: lib/uuid.c
|
F: lib/uuid.c
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -2490,7 +2490,7 @@ MODULE_PARM_DESC(punc_level, "Controls the level of punctuation spoken as the sc
|
||||||
MODULE_PARM_DESC(reading_punc, "It controls the level of punctuation when reviewing the screen with speakup's screen review commands.");
|
MODULE_PARM_DESC(reading_punc, "It controls the level of punctuation when reviewing the screen with speakup's screen review commands.");
|
||||||
MODULE_PARM_DESC(cursor_time, "This controls cursor delay when using arrow keys.");
|
MODULE_PARM_DESC(cursor_time, "This controls cursor delay when using arrow keys.");
|
||||||
MODULE_PARM_DESC(say_control, "This controls if speakup speaks shift, alt and control when those keys are pressed or not.");
|
MODULE_PARM_DESC(say_control, "This controls if speakup speaks shift, alt and control when those keys are pressed or not.");
|
||||||
MODULE_PARM_DESC(say_word_ctl, "Sets thw say_word_ctl on load.");
|
MODULE_PARM_DESC(say_word_ctl, "Sets the say_word_ctl on load.");
|
||||||
MODULE_PARM_DESC(no_interrupt, "Controls if typing interrupts output from speakup.");
|
MODULE_PARM_DESC(no_interrupt, "Controls if typing interrupts output from speakup.");
|
||||||
MODULE_PARM_DESC(key_echo, "Controls if speakup speaks keys when they are typed. One = on zero = off or don't echo keys.");
|
MODULE_PARM_DESC(key_echo, "Controls if speakup speaks keys when they are typed. One = on zero = off or don't echo keys.");
|
||||||
MODULE_PARM_DESC(cur_phonetic, "Controls if speakup speaks letters phonetically during navigation. One = on zero = off or don't speak phonetically.");
|
MODULE_PARM_DESC(cur_phonetic, "Controls if speakup speaks letters phonetically during navigation. One = on zero = off or don't speak phonetically.");
|
||||||
|
|
|
||||||
|
|
@ -281,7 +281,7 @@ _binder_proc_lock(struct binder_proc *proc, int line)
|
||||||
*
|
*
|
||||||
* Release lock acquired via binder_proc_lock()
|
* Release lock acquired via binder_proc_lock()
|
||||||
*/
|
*/
|
||||||
#define binder_proc_unlock(_proc) _binder_proc_unlock(_proc, __LINE__)
|
#define binder_proc_unlock(proc) _binder_proc_unlock(proc, __LINE__)
|
||||||
static void
|
static void
|
||||||
_binder_proc_unlock(struct binder_proc *proc, int line)
|
_binder_proc_unlock(struct binder_proc *proc, int line)
|
||||||
__releases(&proc->outer_lock)
|
__releases(&proc->outer_lock)
|
||||||
|
|
@ -378,7 +378,7 @@ _binder_node_inner_lock(struct binder_node *node, int line)
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* binder_node_unlock() - Release node and inner locks
|
* binder_node_inner_unlock() - Release node and inner locks
|
||||||
* @node: struct binder_node to acquire
|
* @node: struct binder_node to acquire
|
||||||
*
|
*
|
||||||
* Release lock acquired via binder_node_lock()
|
* Release lock acquired via binder_node_lock()
|
||||||
|
|
@ -1194,13 +1194,13 @@ static int binder_inc_ref_olocked(struct binder_ref *ref, int strong,
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* binder_dec_ref() - dec the ref for given handle
|
* binder_dec_ref_olocked() - dec the ref for given handle
|
||||||
* @ref: ref to be decremented
|
* @ref: ref to be decremented
|
||||||
* @strong: if true, strong decrement, else weak
|
* @strong: if true, strong decrement, else weak
|
||||||
*
|
*
|
||||||
* Decrement the ref.
|
* Decrement the ref.
|
||||||
*
|
*
|
||||||
* Return: true if ref is cleaned up and ready to be freed
|
* Return: %true if ref is cleaned up and ready to be freed.
|
||||||
*/
|
*/
|
||||||
static bool binder_dec_ref_olocked(struct binder_ref *ref, int strong)
|
static bool binder_dec_ref_olocked(struct binder_ref *ref, int strong)
|
||||||
{
|
{
|
||||||
|
|
@ -2728,7 +2728,10 @@ binder_find_outdated_transaction_ilocked(struct binder_transaction *t,
|
||||||
*
|
*
|
||||||
* Return: 0 if the transaction was successfully queued
|
* Return: 0 if the transaction was successfully queued
|
||||||
* BR_DEAD_REPLY if the target process or thread is dead
|
* BR_DEAD_REPLY if the target process or thread is dead
|
||||||
* BR_FROZEN_REPLY if the target process or thread is frozen
|
* BR_FROZEN_REPLY if the target process or thread is frozen and
|
||||||
|
* the sync transaction was rejected
|
||||||
|
* BR_TRANSACTION_PENDING_FROZEN if the target process is frozen
|
||||||
|
* and the async transaction was successfully queued
|
||||||
*/
|
*/
|
||||||
static int binder_proc_transaction(struct binder_transaction *t,
|
static int binder_proc_transaction(struct binder_transaction *t,
|
||||||
struct binder_proc *proc,
|
struct binder_proc *proc,
|
||||||
|
|
@ -2738,6 +2741,7 @@ static int binder_proc_transaction(struct binder_transaction *t,
|
||||||
bool oneway = !!(t->flags & TF_ONE_WAY);
|
bool oneway = !!(t->flags & TF_ONE_WAY);
|
||||||
bool pending_async = false;
|
bool pending_async = false;
|
||||||
struct binder_transaction *t_outdated = NULL;
|
struct binder_transaction *t_outdated = NULL;
|
||||||
|
bool frozen = false;
|
||||||
|
|
||||||
BUG_ON(!node);
|
BUG_ON(!node);
|
||||||
binder_node_lock(node);
|
binder_node_lock(node);
|
||||||
|
|
@ -2751,15 +2755,16 @@ static int binder_proc_transaction(struct binder_transaction *t,
|
||||||
|
|
||||||
binder_inner_proc_lock(proc);
|
binder_inner_proc_lock(proc);
|
||||||
if (proc->is_frozen) {
|
if (proc->is_frozen) {
|
||||||
|
frozen = true;
|
||||||
proc->sync_recv |= !oneway;
|
proc->sync_recv |= !oneway;
|
||||||
proc->async_recv |= oneway;
|
proc->async_recv |= oneway;
|
||||||
}
|
}
|
||||||
|
|
||||||
if ((proc->is_frozen && !oneway) || proc->is_dead ||
|
if ((frozen && !oneway) || proc->is_dead ||
|
||||||
(thread && thread->is_dead)) {
|
(thread && thread->is_dead)) {
|
||||||
binder_inner_proc_unlock(proc);
|
binder_inner_proc_unlock(proc);
|
||||||
binder_node_unlock(node);
|
binder_node_unlock(node);
|
||||||
return proc->is_frozen ? BR_FROZEN_REPLY : BR_DEAD_REPLY;
|
return frozen ? BR_FROZEN_REPLY : BR_DEAD_REPLY;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (!thread && !pending_async)
|
if (!thread && !pending_async)
|
||||||
|
|
@ -2770,7 +2775,7 @@ static int binder_proc_transaction(struct binder_transaction *t,
|
||||||
} else if (!pending_async) {
|
} else if (!pending_async) {
|
||||||
binder_enqueue_work_ilocked(&t->work, &proc->todo);
|
binder_enqueue_work_ilocked(&t->work, &proc->todo);
|
||||||
} else {
|
} else {
|
||||||
if ((t->flags & TF_UPDATE_TXN) && proc->is_frozen) {
|
if ((t->flags & TF_UPDATE_TXN) && frozen) {
|
||||||
t_outdated = binder_find_outdated_transaction_ilocked(t,
|
t_outdated = binder_find_outdated_transaction_ilocked(t,
|
||||||
&node->async_todo);
|
&node->async_todo);
|
||||||
if (t_outdated) {
|
if (t_outdated) {
|
||||||
|
|
@ -2807,14 +2812,17 @@ static int binder_proc_transaction(struct binder_transaction *t,
|
||||||
binder_stats_deleted(BINDER_STAT_TRANSACTION);
|
binder_stats_deleted(BINDER_STAT_TRANSACTION);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (oneway && frozen)
|
||||||
|
return BR_TRANSACTION_PENDING_FROZEN;
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* binder_get_node_refs_for_txn() - Get required refs on node for txn
|
* binder_get_node_refs_for_txn() - Get required refs on node for txn
|
||||||
* @node: struct binder_node for which to get refs
|
* @node: struct binder_node for which to get refs
|
||||||
* @proc: returns @node->proc if valid
|
* @procp: returns @node->proc if valid
|
||||||
* @error: if no @proc then returns BR_DEAD_REPLY
|
* @error: if no @procp then returns BR_DEAD_REPLY
|
||||||
*
|
*
|
||||||
* User-space normally keeps the node alive when creating a transaction
|
* User-space normally keeps the node alive when creating a transaction
|
||||||
* since it has a reference to the target. The local strong ref keeps it
|
* since it has a reference to the target. The local strong ref keeps it
|
||||||
|
|
@ -2828,8 +2836,8 @@ static int binder_proc_transaction(struct binder_transaction *t,
|
||||||
* constructing the transaction, so we take that here as well.
|
* constructing the transaction, so we take that here as well.
|
||||||
*
|
*
|
||||||
* Return: The target_node with refs taken or NULL if no @node->proc is NULL.
|
* Return: The target_node with refs taken or NULL if no @node->proc is NULL.
|
||||||
* Also sets @proc if valid. If the @node->proc is NULL indicating that the
|
* Also sets @procp if valid. If the @node->proc is NULL indicating that the
|
||||||
* target proc has died, @error is set to BR_DEAD_REPLY
|
* target proc has died, @error is set to BR_DEAD_REPLY.
|
||||||
*/
|
*/
|
||||||
static struct binder_node *binder_get_node_refs_for_txn(
|
static struct binder_node *binder_get_node_refs_for_txn(
|
||||||
struct binder_node *node,
|
struct binder_node *node,
|
||||||
|
|
@ -3607,9 +3615,17 @@ static void binder_transaction(struct binder_proc *proc,
|
||||||
} else {
|
} else {
|
||||||
BUG_ON(target_node == NULL);
|
BUG_ON(target_node == NULL);
|
||||||
BUG_ON(t->buffer->async_transaction != 1);
|
BUG_ON(t->buffer->async_transaction != 1);
|
||||||
binder_enqueue_thread_work(thread, tcomplete);
|
|
||||||
return_error = binder_proc_transaction(t, target_proc, NULL);
|
return_error = binder_proc_transaction(t, target_proc, NULL);
|
||||||
if (return_error)
|
/*
|
||||||
|
* Let the caller know when async transaction reaches a frozen
|
||||||
|
* process and is put in a pending queue, waiting for the target
|
||||||
|
* process to be unfrozen.
|
||||||
|
*/
|
||||||
|
if (return_error == BR_TRANSACTION_PENDING_FROZEN)
|
||||||
|
tcomplete->type = BINDER_WORK_TRANSACTION_PENDING;
|
||||||
|
binder_enqueue_thread_work(thread, tcomplete);
|
||||||
|
if (return_error &&
|
||||||
|
return_error != BR_TRANSACTION_PENDING_FROZEN)
|
||||||
goto err_dead_proc_or_thread;
|
goto err_dead_proc_or_thread;
|
||||||
}
|
}
|
||||||
if (target_thread)
|
if (target_thread)
|
||||||
|
|
@ -4440,10 +4456,13 @@ retry:
|
||||||
binder_stat_br(proc, thread, cmd);
|
binder_stat_br(proc, thread, cmd);
|
||||||
} break;
|
} break;
|
||||||
case BINDER_WORK_TRANSACTION_COMPLETE:
|
case BINDER_WORK_TRANSACTION_COMPLETE:
|
||||||
|
case BINDER_WORK_TRANSACTION_PENDING:
|
||||||
case BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT: {
|
case BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT: {
|
||||||
if (proc->oneway_spam_detection_enabled &&
|
if (proc->oneway_spam_detection_enabled &&
|
||||||
w->type == BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT)
|
w->type == BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT)
|
||||||
cmd = BR_ONEWAY_SPAM_SUSPECT;
|
cmd = BR_ONEWAY_SPAM_SUSPECT;
|
||||||
|
else if (w->type == BINDER_WORK_TRANSACTION_PENDING)
|
||||||
|
cmd = BR_TRANSACTION_PENDING_FROZEN;
|
||||||
else
|
else
|
||||||
cmd = BR_TRANSACTION_COMPLETE;
|
cmd = BR_TRANSACTION_COMPLETE;
|
||||||
binder_inner_proc_unlock(proc);
|
binder_inner_proc_unlock(proc);
|
||||||
|
|
@ -5006,20 +5025,14 @@ static __poll_t binder_poll(struct file *filp,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static int binder_ioctl_write_read(struct file *filp,
|
static int binder_ioctl_write_read(struct file *filp, unsigned long arg,
|
||||||
unsigned int cmd, unsigned long arg,
|
|
||||||
struct binder_thread *thread)
|
struct binder_thread *thread)
|
||||||
{
|
{
|
||||||
int ret = 0;
|
int ret = 0;
|
||||||
struct binder_proc *proc = filp->private_data;
|
struct binder_proc *proc = filp->private_data;
|
||||||
unsigned int size = _IOC_SIZE(cmd);
|
|
||||||
void __user *ubuf = (void __user *)arg;
|
void __user *ubuf = (void __user *)arg;
|
||||||
struct binder_write_read bwr;
|
struct binder_write_read bwr;
|
||||||
|
|
||||||
if (size != sizeof(struct binder_write_read)) {
|
|
||||||
ret = -EINVAL;
|
|
||||||
goto out;
|
|
||||||
}
|
|
||||||
if (copy_from_user(&bwr, ubuf, sizeof(bwr))) {
|
if (copy_from_user(&bwr, ubuf, sizeof(bwr))) {
|
||||||
ret = -EFAULT;
|
ret = -EFAULT;
|
||||||
goto out;
|
goto out;
|
||||||
|
|
@ -5296,7 +5309,6 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
|
||||||
int ret;
|
int ret;
|
||||||
struct binder_proc *proc = filp->private_data;
|
struct binder_proc *proc = filp->private_data;
|
||||||
struct binder_thread *thread;
|
struct binder_thread *thread;
|
||||||
unsigned int size = _IOC_SIZE(cmd);
|
|
||||||
void __user *ubuf = (void __user *)arg;
|
void __user *ubuf = (void __user *)arg;
|
||||||
|
|
||||||
/*pr_info("binder_ioctl: %d:%d %x %lx\n",
|
/*pr_info("binder_ioctl: %d:%d %x %lx\n",
|
||||||
|
|
@ -5318,7 +5330,7 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
|
||||||
|
|
||||||
switch (cmd) {
|
switch (cmd) {
|
||||||
case BINDER_WRITE_READ:
|
case BINDER_WRITE_READ:
|
||||||
ret = binder_ioctl_write_read(filp, cmd, arg, thread);
|
ret = binder_ioctl_write_read(filp, arg, thread);
|
||||||
if (ret)
|
if (ret)
|
||||||
goto err;
|
goto err;
|
||||||
break;
|
break;
|
||||||
|
|
@ -5361,10 +5373,6 @@ static long binder_ioctl(struct file *filp, unsigned int cmd, unsigned long arg)
|
||||||
case BINDER_VERSION: {
|
case BINDER_VERSION: {
|
||||||
struct binder_version __user *ver = ubuf;
|
struct binder_version __user *ver = ubuf;
|
||||||
|
|
||||||
if (size != sizeof(struct binder_version)) {
|
|
||||||
ret = -EINVAL;
|
|
||||||
goto err;
|
|
||||||
}
|
|
||||||
if (put_user(BINDER_CURRENT_PROTOCOL_VERSION,
|
if (put_user(BINDER_CURRENT_PROTOCOL_VERSION,
|
||||||
&ver->protocol_version)) {
|
&ver->protocol_version)) {
|
||||||
ret = -EINVAL;
|
ret = -EINVAL;
|
||||||
|
|
@ -6169,6 +6177,7 @@ static const char * const binder_return_strings[] = {
|
||||||
"BR_FAILED_REPLY",
|
"BR_FAILED_REPLY",
|
||||||
"BR_FROZEN_REPLY",
|
"BR_FROZEN_REPLY",
|
||||||
"BR_ONEWAY_SPAM_SUSPECT",
|
"BR_ONEWAY_SPAM_SUSPECT",
|
||||||
|
"BR_TRANSACTION_PENDING_FROZEN"
|
||||||
};
|
};
|
||||||
|
|
||||||
static const char * const binder_command_strings[] = {
|
static const char * const binder_command_strings[] = {
|
||||||
|
|
|
||||||
|
|
@ -133,7 +133,7 @@ enum binder_stat_types {
|
||||||
};
|
};
|
||||||
|
|
||||||
struct binder_stats {
|
struct binder_stats {
|
||||||
atomic_t br[_IOC_NR(BR_ONEWAY_SPAM_SUSPECT) + 1];
|
atomic_t br[_IOC_NR(BR_TRANSACTION_PENDING_FROZEN) + 1];
|
||||||
atomic_t bc[_IOC_NR(BC_REPLY_SG) + 1];
|
atomic_t bc[_IOC_NR(BC_REPLY_SG) + 1];
|
||||||
atomic_t obj_created[BINDER_STAT_COUNT];
|
atomic_t obj_created[BINDER_STAT_COUNT];
|
||||||
atomic_t obj_deleted[BINDER_STAT_COUNT];
|
atomic_t obj_deleted[BINDER_STAT_COUNT];
|
||||||
|
|
@ -152,6 +152,7 @@ struct binder_work {
|
||||||
enum binder_work_type {
|
enum binder_work_type {
|
||||||
BINDER_WORK_TRANSACTION = 1,
|
BINDER_WORK_TRANSACTION = 1,
|
||||||
BINDER_WORK_TRANSACTION_COMPLETE,
|
BINDER_WORK_TRANSACTION_COMPLETE,
|
||||||
|
BINDER_WORK_TRANSACTION_PENDING,
|
||||||
BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT,
|
BINDER_WORK_TRANSACTION_ONEWAY_SPAM_SUSPECT,
|
||||||
BINDER_WORK_RETURN_ERROR,
|
BINDER_WORK_RETURN_ERROR,
|
||||||
BINDER_WORK_NODE,
|
BINDER_WORK_NODE,
|
||||||
|
|
|
||||||
|
|
@ -222,14 +222,14 @@ err:
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* binderfs_ctl_ioctl - handle binder device node allocation requests
|
* binder_ctl_ioctl - handle binder device node allocation requests
|
||||||
*
|
*
|
||||||
* The request handler for the binder-control device. All requests operate on
|
* The request handler for the binder-control device. All requests operate on
|
||||||
* the binderfs mount the binder-control device resides in:
|
* the binderfs mount the binder-control device resides in:
|
||||||
* - BINDER_CTL_ADD
|
* - BINDER_CTL_ADD
|
||||||
* Allocate a new binder device.
|
* Allocate a new binder device.
|
||||||
*
|
*
|
||||||
* Return: 0 on success, negative errno on failure
|
* Return: %0 on success, negative errno on failure.
|
||||||
*/
|
*/
|
||||||
static long binder_ctl_ioctl(struct file *file, unsigned int cmd,
|
static long binder_ctl_ioctl(struct file *file, unsigned int cmd,
|
||||||
unsigned long arg)
|
unsigned long arg)
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
# Host MHI stack
|
# Host MHI stack
|
||||||
obj-y += host/
|
obj-$(CONFIG_MHI_BUS) += host/
|
||||||
|
|
||||||
# Endpoint MHI stack
|
# Endpoint MHI stack
|
||||||
obj-y += ep/
|
obj-$(CONFIG_MHI_BUS_EP) += ep/
|
||||||
|
|
|
||||||
|
|
@ -123,6 +123,13 @@ static int mhi_ep_process_cmd_ring(struct mhi_ep_ring *ring, struct mhi_ring_ele
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
ch_id = MHI_TRE_GET_CMD_CHID(el);
|
ch_id = MHI_TRE_GET_CMD_CHID(el);
|
||||||
|
|
||||||
|
/* Check if the channel is supported by the controller */
|
||||||
|
if ((ch_id >= mhi_cntrl->max_chan) || !mhi_cntrl->mhi_chan[ch_id].name) {
|
||||||
|
dev_err(dev, "Channel (%u) not supported!\n", ch_id);
|
||||||
|
return -ENODEV;
|
||||||
|
}
|
||||||
|
|
||||||
mhi_chan = &mhi_cntrl->mhi_chan[ch_id];
|
mhi_chan = &mhi_cntrl->mhi_chan[ch_id];
|
||||||
ch_ring = &mhi_cntrl->mhi_chan[ch_id].ring;
|
ch_ring = &mhi_cntrl->mhi_chan[ch_id].ring;
|
||||||
|
|
||||||
|
|
@ -196,9 +203,11 @@ static int mhi_ep_process_cmd_ring(struct mhi_ep_ring *ring, struct mhi_ring_ele
|
||||||
mhi_ep_mmio_disable_chdb(mhi_cntrl, ch_id);
|
mhi_ep_mmio_disable_chdb(mhi_cntrl, ch_id);
|
||||||
|
|
||||||
/* Send channel disconnect status to client drivers */
|
/* Send channel disconnect status to client drivers */
|
||||||
|
if (mhi_chan->xfer_cb) {
|
||||||
result.transaction_status = -ENOTCONN;
|
result.transaction_status = -ENOTCONN;
|
||||||
result.bytes_xferd = 0;
|
result.bytes_xferd = 0;
|
||||||
mhi_chan->xfer_cb(mhi_chan->mhi_dev, &result);
|
mhi_chan->xfer_cb(mhi_chan->mhi_dev, &result);
|
||||||
|
}
|
||||||
|
|
||||||
/* Set channel state to STOP */
|
/* Set channel state to STOP */
|
||||||
mhi_chan->state = MHI_CH_STATE_STOP;
|
mhi_chan->state = MHI_CH_STATE_STOP;
|
||||||
|
|
@ -217,7 +226,7 @@ static int mhi_ep_process_cmd_ring(struct mhi_ep_ring *ring, struct mhi_ring_ele
|
||||||
mutex_unlock(&mhi_chan->lock);
|
mutex_unlock(&mhi_chan->lock);
|
||||||
break;
|
break;
|
||||||
case MHI_PKT_TYPE_RESET_CHAN_CMD:
|
case MHI_PKT_TYPE_RESET_CHAN_CMD:
|
||||||
dev_dbg(dev, "Received STOP command for channel (%u)\n", ch_id);
|
dev_dbg(dev, "Received RESET command for channel (%u)\n", ch_id);
|
||||||
if (!ch_ring->started) {
|
if (!ch_ring->started) {
|
||||||
dev_err(dev, "Channel (%u) not opened\n", ch_id);
|
dev_err(dev, "Channel (%u) not opened\n", ch_id);
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
|
|
@ -228,9 +237,11 @@ static int mhi_ep_process_cmd_ring(struct mhi_ep_ring *ring, struct mhi_ring_ele
|
||||||
mhi_ep_ring_reset(mhi_cntrl, ch_ring);
|
mhi_ep_ring_reset(mhi_cntrl, ch_ring);
|
||||||
|
|
||||||
/* Send channel disconnect status to client driver */
|
/* Send channel disconnect status to client driver */
|
||||||
|
if (mhi_chan->xfer_cb) {
|
||||||
result.transaction_status = -ENOTCONN;
|
result.transaction_status = -ENOTCONN;
|
||||||
result.bytes_xferd = 0;
|
result.bytes_xferd = 0;
|
||||||
mhi_chan->xfer_cb(mhi_chan->mhi_dev, &result);
|
mhi_chan->xfer_cb(mhi_chan->mhi_dev, &result);
|
||||||
|
}
|
||||||
|
|
||||||
/* Set channel state to DISABLED */
|
/* Set channel state to DISABLED */
|
||||||
mhi_chan->state = MHI_CH_STATE_DISABLED;
|
mhi_chan->state = MHI_CH_STATE_DISABLED;
|
||||||
|
|
@ -719,24 +730,37 @@ static void mhi_ep_ch_ring_worker(struct work_struct *work)
|
||||||
list_del(&itr->node);
|
list_del(&itr->node);
|
||||||
ring = itr->ring;
|
ring = itr->ring;
|
||||||
|
|
||||||
|
chan = &mhi_cntrl->mhi_chan[ring->ch_id];
|
||||||
|
mutex_lock(&chan->lock);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The ring could've stopped while we waited to grab the (chan->lock), so do
|
||||||
|
* a sanity check before going further.
|
||||||
|
*/
|
||||||
|
if (!ring->started) {
|
||||||
|
mutex_unlock(&chan->lock);
|
||||||
|
kfree(itr);
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
/* Update the write offset for the ring */
|
/* Update the write offset for the ring */
|
||||||
ret = mhi_ep_update_wr_offset(ring);
|
ret = mhi_ep_update_wr_offset(ring);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "Error updating write offset for ring\n");
|
dev_err(dev, "Error updating write offset for ring\n");
|
||||||
|
mutex_unlock(&chan->lock);
|
||||||
kfree(itr);
|
kfree(itr);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Sanity check to make sure there are elements in the ring */
|
/* Sanity check to make sure there are elements in the ring */
|
||||||
if (ring->rd_offset == ring->wr_offset) {
|
if (ring->rd_offset == ring->wr_offset) {
|
||||||
|
mutex_unlock(&chan->lock);
|
||||||
kfree(itr);
|
kfree(itr);
|
||||||
continue;
|
continue;
|
||||||
}
|
}
|
||||||
|
|
||||||
el = &ring->ring_cache[ring->rd_offset];
|
el = &ring->ring_cache[ring->rd_offset];
|
||||||
chan = &mhi_cntrl->mhi_chan[ring->ch_id];
|
|
||||||
|
|
||||||
mutex_lock(&chan->lock);
|
|
||||||
dev_dbg(dev, "Processing the ring for channel (%u)\n", ring->ch_id);
|
dev_dbg(dev, "Processing the ring for channel (%u)\n", ring->ch_id);
|
||||||
ret = mhi_ep_process_ch_ring(ring, el);
|
ret = mhi_ep_process_ch_ring(ring, el);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
|
|
@ -973,44 +997,25 @@ static void mhi_ep_abort_transfer(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
static void mhi_ep_reset_worker(struct work_struct *work)
|
static void mhi_ep_reset_worker(struct work_struct *work)
|
||||||
{
|
{
|
||||||
struct mhi_ep_cntrl *mhi_cntrl = container_of(work, struct mhi_ep_cntrl, reset_work);
|
struct mhi_ep_cntrl *mhi_cntrl = container_of(work, struct mhi_ep_cntrl, reset_work);
|
||||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
|
||||||
enum mhi_state cur_state;
|
enum mhi_state cur_state;
|
||||||
int ret;
|
|
||||||
|
|
||||||
mhi_ep_abort_transfer(mhi_cntrl);
|
mhi_ep_power_down(mhi_cntrl);
|
||||||
|
|
||||||
|
mutex_lock(&mhi_cntrl->state_lock);
|
||||||
|
|
||||||
spin_lock_bh(&mhi_cntrl->state_lock);
|
|
||||||
/* Reset MMIO to signal host that the MHI_RESET is completed in endpoint */
|
/* Reset MMIO to signal host that the MHI_RESET is completed in endpoint */
|
||||||
mhi_ep_mmio_reset(mhi_cntrl);
|
mhi_ep_mmio_reset(mhi_cntrl);
|
||||||
cur_state = mhi_cntrl->mhi_state;
|
cur_state = mhi_cntrl->mhi_state;
|
||||||
spin_unlock_bh(&mhi_cntrl->state_lock);
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Only proceed further if the reset is due to SYS_ERR. The host will
|
* Only proceed further if the reset is due to SYS_ERR. The host will
|
||||||
* issue reset during shutdown also and we don't need to do re-init in
|
* issue reset during shutdown also and we don't need to do re-init in
|
||||||
* that case.
|
* that case.
|
||||||
*/
|
*/
|
||||||
if (cur_state == MHI_STATE_SYS_ERR) {
|
if (cur_state == MHI_STATE_SYS_ERR)
|
||||||
mhi_ep_mmio_init(mhi_cntrl);
|
mhi_ep_power_up(mhi_cntrl);
|
||||||
|
|
||||||
/* Set AMSS EE before signaling ready state */
|
mutex_unlock(&mhi_cntrl->state_lock);
|
||||||
mhi_ep_mmio_set_env(mhi_cntrl, MHI_EE_AMSS);
|
|
||||||
|
|
||||||
/* All set, notify the host that we are ready */
|
|
||||||
ret = mhi_ep_set_ready_state(mhi_cntrl);
|
|
||||||
if (ret)
|
|
||||||
return;
|
|
||||||
|
|
||||||
dev_dbg(dev, "READY state notification sent to the host\n");
|
|
||||||
|
|
||||||
ret = mhi_ep_enable(mhi_cntrl);
|
|
||||||
if (ret) {
|
|
||||||
dev_err(dev, "Failed to enable MHI endpoint: %d\n", ret);
|
|
||||||
return;
|
|
||||||
}
|
|
||||||
|
|
||||||
enable_irq(mhi_cntrl->irq);
|
|
||||||
}
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/*
|
/*
|
||||||
|
|
@ -1089,12 +1094,12 @@ EXPORT_SYMBOL_GPL(mhi_ep_power_up);
|
||||||
|
|
||||||
void mhi_ep_power_down(struct mhi_ep_cntrl *mhi_cntrl)
|
void mhi_ep_power_down(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
{
|
{
|
||||||
if (mhi_cntrl->enabled)
|
if (mhi_cntrl->enabled) {
|
||||||
mhi_ep_abort_transfer(mhi_cntrl);
|
mhi_ep_abort_transfer(mhi_cntrl);
|
||||||
|
|
||||||
kfree(mhi_cntrl->mhi_event);
|
kfree(mhi_cntrl->mhi_event);
|
||||||
disable_irq(mhi_cntrl->irq);
|
disable_irq(mhi_cntrl->irq);
|
||||||
}
|
}
|
||||||
|
}
|
||||||
EXPORT_SYMBOL_GPL(mhi_ep_power_down);
|
EXPORT_SYMBOL_GPL(mhi_ep_power_down);
|
||||||
|
|
||||||
void mhi_ep_suspend_channels(struct mhi_ep_cntrl *mhi_cntrl)
|
void mhi_ep_suspend_channels(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
|
|
@ -1119,6 +1124,7 @@ void mhi_ep_suspend_channels(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
|
|
||||||
dev_dbg(&mhi_chan->mhi_dev->dev, "Suspending channel\n");
|
dev_dbg(&mhi_chan->mhi_dev->dev, "Suspending channel\n");
|
||||||
/* Set channel state to SUSPENDED */
|
/* Set channel state to SUSPENDED */
|
||||||
|
mhi_chan->state = MHI_CH_STATE_SUSPENDED;
|
||||||
tmp &= ~CHAN_CTX_CHSTATE_MASK;
|
tmp &= ~CHAN_CTX_CHSTATE_MASK;
|
||||||
tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_SUSPENDED);
|
tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_SUSPENDED);
|
||||||
mhi_cntrl->ch_ctx_cache[i].chcfg = cpu_to_le32(tmp);
|
mhi_cntrl->ch_ctx_cache[i].chcfg = cpu_to_le32(tmp);
|
||||||
|
|
@ -1148,6 +1154,7 @@ void mhi_ep_resume_channels(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
|
|
||||||
dev_dbg(&mhi_chan->mhi_dev->dev, "Resuming channel\n");
|
dev_dbg(&mhi_chan->mhi_dev->dev, "Resuming channel\n");
|
||||||
/* Set channel state to RUNNING */
|
/* Set channel state to RUNNING */
|
||||||
|
mhi_chan->state = MHI_CH_STATE_RUNNING;
|
||||||
tmp &= ~CHAN_CTX_CHSTATE_MASK;
|
tmp &= ~CHAN_CTX_CHSTATE_MASK;
|
||||||
tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_RUNNING);
|
tmp |= FIELD_PREP(CHAN_CTX_CHSTATE_MASK, MHI_CH_STATE_RUNNING);
|
||||||
mhi_cntrl->ch_ctx_cache[i].chcfg = cpu_to_le32(tmp);
|
mhi_cntrl->ch_ctx_cache[i].chcfg = cpu_to_le32(tmp);
|
||||||
|
|
@ -1381,8 +1388,8 @@ int mhi_ep_register_controller(struct mhi_ep_cntrl *mhi_cntrl,
|
||||||
|
|
||||||
INIT_LIST_HEAD(&mhi_cntrl->st_transition_list);
|
INIT_LIST_HEAD(&mhi_cntrl->st_transition_list);
|
||||||
INIT_LIST_HEAD(&mhi_cntrl->ch_db_list);
|
INIT_LIST_HEAD(&mhi_cntrl->ch_db_list);
|
||||||
spin_lock_init(&mhi_cntrl->state_lock);
|
|
||||||
spin_lock_init(&mhi_cntrl->list_lock);
|
spin_lock_init(&mhi_cntrl->list_lock);
|
||||||
|
mutex_init(&mhi_cntrl->state_lock);
|
||||||
mutex_init(&mhi_cntrl->event_lock);
|
mutex_init(&mhi_cntrl->event_lock);
|
||||||
|
|
||||||
/* Set MHI version and AMSS EE before enumeration */
|
/* Set MHI version and AMSS EE before enumeration */
|
||||||
|
|
|
||||||
|
|
@ -63,24 +63,23 @@ int mhi_ep_set_m0_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
/* If MHI is in M3, resume suspended channels */
|
/* If MHI is in M3, resume suspended channels */
|
||||||
spin_lock_bh(&mhi_cntrl->state_lock);
|
mutex_lock(&mhi_cntrl->state_lock);
|
||||||
|
|
||||||
old_state = mhi_cntrl->mhi_state;
|
old_state = mhi_cntrl->mhi_state;
|
||||||
if (old_state == MHI_STATE_M3)
|
if (old_state == MHI_STATE_M3)
|
||||||
mhi_ep_resume_channels(mhi_cntrl);
|
mhi_ep_resume_channels(mhi_cntrl);
|
||||||
|
|
||||||
ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M0);
|
ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M0);
|
||||||
spin_unlock_bh(&mhi_cntrl->state_lock);
|
|
||||||
|
|
||||||
if (ret) {
|
if (ret) {
|
||||||
mhi_ep_handle_syserr(mhi_cntrl);
|
mhi_ep_handle_syserr(mhi_cntrl);
|
||||||
return ret;
|
goto err_unlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
/* Signal host that the device moved to M0 */
|
/* Signal host that the device moved to M0 */
|
||||||
ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M0);
|
ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M0);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "Failed sending M0 state change event\n");
|
dev_err(dev, "Failed sending M0 state change event\n");
|
||||||
return ret;
|
goto err_unlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
if (old_state == MHI_STATE_READY) {
|
if (old_state == MHI_STATE_READY) {
|
||||||
|
|
@ -88,11 +87,14 @@ int mhi_ep_set_m0_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
ret = mhi_ep_send_ee_event(mhi_cntrl, MHI_EE_AMSS);
|
ret = mhi_ep_send_ee_event(mhi_cntrl, MHI_EE_AMSS);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "Failed sending AMSS EE event\n");
|
dev_err(dev, "Failed sending AMSS EE event\n");
|
||||||
return ret;
|
goto err_unlock;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
err_unlock:
|
||||||
|
mutex_unlock(&mhi_cntrl->state_lock);
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int mhi_ep_set_m3_state(struct mhi_ep_cntrl *mhi_cntrl)
|
int mhi_ep_set_m3_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
|
|
@ -100,13 +102,12 @@ int mhi_ep_set_m3_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
struct device *dev = &mhi_cntrl->mhi_dev->dev;
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
spin_lock_bh(&mhi_cntrl->state_lock);
|
mutex_lock(&mhi_cntrl->state_lock);
|
||||||
ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M3);
|
|
||||||
spin_unlock_bh(&mhi_cntrl->state_lock);
|
|
||||||
|
|
||||||
|
ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_M3);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
mhi_ep_handle_syserr(mhi_cntrl);
|
mhi_ep_handle_syserr(mhi_cntrl);
|
||||||
return ret;
|
goto err_unlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
mhi_ep_suspend_channels(mhi_cntrl);
|
mhi_ep_suspend_channels(mhi_cntrl);
|
||||||
|
|
@ -115,10 +116,13 @@ int mhi_ep_set_m3_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M3);
|
ret = mhi_ep_send_state_change_event(mhi_cntrl, MHI_STATE_M3);
|
||||||
if (ret) {
|
if (ret) {
|
||||||
dev_err(dev, "Failed sending M3 state change event\n");
|
dev_err(dev, "Failed sending M3 state change event\n");
|
||||||
return ret;
|
goto err_unlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
return 0;
|
err_unlock:
|
||||||
|
mutex_unlock(&mhi_cntrl->state_lock);
|
||||||
|
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int mhi_ep_set_ready_state(struct mhi_ep_cntrl *mhi_cntrl)
|
int mhi_ep_set_ready_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
|
|
@ -127,22 +131,24 @@ int mhi_ep_set_ready_state(struct mhi_ep_cntrl *mhi_cntrl)
|
||||||
enum mhi_state mhi_state;
|
enum mhi_state mhi_state;
|
||||||
int ret, is_ready;
|
int ret, is_ready;
|
||||||
|
|
||||||
spin_lock_bh(&mhi_cntrl->state_lock);
|
mutex_lock(&mhi_cntrl->state_lock);
|
||||||
|
|
||||||
/* Ensure that the MHISTATUS is set to RESET by host */
|
/* Ensure that the MHISTATUS is set to RESET by host */
|
||||||
mhi_state = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_MHISTATE_MASK);
|
mhi_state = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_MHISTATE_MASK);
|
||||||
is_ready = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_READY_MASK);
|
is_ready = mhi_ep_mmio_masked_read(mhi_cntrl, EP_MHISTATUS, MHISTATUS_READY_MASK);
|
||||||
|
|
||||||
if (mhi_state != MHI_STATE_RESET || is_ready) {
|
if (mhi_state != MHI_STATE_RESET || is_ready) {
|
||||||
dev_err(dev, "READY state transition failed. MHI host not in RESET state\n");
|
dev_err(dev, "READY state transition failed. MHI host not in RESET state\n");
|
||||||
spin_unlock_bh(&mhi_cntrl->state_lock);
|
ret = -EIO;
|
||||||
return -EIO;
|
goto err_unlock;
|
||||||
}
|
}
|
||||||
|
|
||||||
ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_READY);
|
ret = mhi_ep_set_mhi_state(mhi_cntrl, MHI_STATE_READY);
|
||||||
spin_unlock_bh(&mhi_cntrl->state_lock);
|
|
||||||
|
|
||||||
if (ret)
|
if (ret)
|
||||||
mhi_ep_handle_syserr(mhi_cntrl);
|
mhi_ep_handle_syserr(mhi_cntrl);
|
||||||
|
|
||||||
|
err_unlock:
|
||||||
|
mutex_unlock(&mhi_cntrl->state_lock);
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
|
||||||
|
|
@ -1449,4 +1449,4 @@ postcore_initcall(mhi_init);
|
||||||
module_exit(mhi_exit);
|
module_exit(mhi_exit);
|
||||||
|
|
||||||
MODULE_LICENSE("GPL v2");
|
MODULE_LICENSE("GPL v2");
|
||||||
MODULE_DESCRIPTION("MHI Host Interface");
|
MODULE_DESCRIPTION("Modem Host Interface");
|
||||||
|
|
|
||||||
|
|
@ -8,17 +8,24 @@
|
||||||
* for more details.
|
* for more details.
|
||||||
*/
|
*/
|
||||||
|
|
||||||
|
#include <linux/clk.h>
|
||||||
#include <linux/module.h>
|
#include <linux/module.h>
|
||||||
#include <linux/of_platform.h>
|
#include <linux/of_platform.h>
|
||||||
#include <linux/platform_device.h>
|
#include <linux/platform_device.h>
|
||||||
#include <linux/pm_runtime.h>
|
#include <linux/pm_runtime.h>
|
||||||
|
|
||||||
|
struct simple_pm_bus {
|
||||||
|
struct clk_bulk_data *clks;
|
||||||
|
int num_clks;
|
||||||
|
};
|
||||||
|
|
||||||
static int simple_pm_bus_probe(struct platform_device *pdev)
|
static int simple_pm_bus_probe(struct platform_device *pdev)
|
||||||
{
|
{
|
||||||
const struct device *dev = &pdev->dev;
|
const struct device *dev = &pdev->dev;
|
||||||
const struct of_dev_auxdata *lookup = dev_get_platdata(dev);
|
const struct of_dev_auxdata *lookup = dev_get_platdata(dev);
|
||||||
struct device_node *np = dev->of_node;
|
struct device_node *np = dev->of_node;
|
||||||
const struct of_device_id *match;
|
const struct of_device_id *match;
|
||||||
|
struct simple_pm_bus *bus;
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Allow user to use driver_override to bind this driver to a
|
* Allow user to use driver_override to bind this driver to a
|
||||||
|
|
@ -44,6 +51,16 @@ static int simple_pm_bus_probe(struct platform_device *pdev)
|
||||||
return -ENODEV;
|
return -ENODEV;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
bus = devm_kzalloc(&pdev->dev, sizeof(*bus), GFP_KERNEL);
|
||||||
|
if (!bus)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
bus->num_clks = devm_clk_bulk_get_all(&pdev->dev, &bus->clks);
|
||||||
|
if (bus->num_clks < 0)
|
||||||
|
return dev_err_probe(&pdev->dev, bus->num_clks, "failed to get clocks\n");
|
||||||
|
|
||||||
|
dev_set_drvdata(&pdev->dev, bus);
|
||||||
|
|
||||||
dev_dbg(&pdev->dev, "%s\n", __func__);
|
dev_dbg(&pdev->dev, "%s\n", __func__);
|
||||||
|
|
||||||
pm_runtime_enable(&pdev->dev);
|
pm_runtime_enable(&pdev->dev);
|
||||||
|
|
@ -67,6 +84,34 @@ static int simple_pm_bus_remove(struct platform_device *pdev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
static int simple_pm_bus_runtime_suspend(struct device *dev)
|
||||||
|
{
|
||||||
|
struct simple_pm_bus *bus = dev_get_drvdata(dev);
|
||||||
|
|
||||||
|
clk_bulk_disable_unprepare(bus->num_clks, bus->clks);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int simple_pm_bus_runtime_resume(struct device *dev)
|
||||||
|
{
|
||||||
|
struct simple_pm_bus *bus = dev_get_drvdata(dev);
|
||||||
|
int ret;
|
||||||
|
|
||||||
|
ret = clk_bulk_prepare_enable(bus->num_clks, bus->clks);
|
||||||
|
if (ret) {
|
||||||
|
dev_err(dev, "failed to enable clocks: %d\n", ret);
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static const struct dev_pm_ops simple_pm_bus_pm_ops = {
|
||||||
|
RUNTIME_PM_OPS(simple_pm_bus_runtime_suspend, simple_pm_bus_runtime_resume, NULL)
|
||||||
|
NOIRQ_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, pm_runtime_force_resume)
|
||||||
|
};
|
||||||
|
|
||||||
#define ONLY_BUS ((void *) 1) /* Match if the device is only a bus. */
|
#define ONLY_BUS ((void *) 1) /* Match if the device is only a bus. */
|
||||||
|
|
||||||
static const struct of_device_id simple_pm_bus_of_match[] = {
|
static const struct of_device_id simple_pm_bus_of_match[] = {
|
||||||
|
|
@ -85,6 +130,7 @@ static struct platform_driver simple_pm_bus_driver = {
|
||||||
.driver = {
|
.driver = {
|
||||||
.name = "simple-pm-bus",
|
.name = "simple-pm-bus",
|
||||||
.of_match_table = simple_pm_bus_of_match,
|
.of_match_table = simple_pm_bus_of_match,
|
||||||
|
.pm = pm_ptr(&simple_pm_bus_pm_ops),
|
||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -197,8 +197,10 @@ static int __init applicom_init(void)
|
||||||
if (!pci_match_id(applicom_pci_tbl, dev))
|
if (!pci_match_id(applicom_pci_tbl, dev))
|
||||||
continue;
|
continue;
|
||||||
|
|
||||||
if (pci_enable_device(dev))
|
if (pci_enable_device(dev)) {
|
||||||
|
pci_dev_put(dev);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
|
}
|
||||||
|
|
||||||
RamIO = ioremap(pci_resource_start(dev, 0), LEN_RAM_IO);
|
RamIO = ioremap(pci_resource_start(dev, 0), LEN_RAM_IO);
|
||||||
|
|
||||||
|
|
@ -207,6 +209,7 @@ static int __init applicom_init(void)
|
||||||
"space at 0x%llx\n",
|
"space at 0x%llx\n",
|
||||||
(unsigned long long)pci_resource_start(dev, 0));
|
(unsigned long long)pci_resource_start(dev, 0));
|
||||||
pci_disable_device(dev);
|
pci_disable_device(dev);
|
||||||
|
pci_dev_put(dev);
|
||||||
return -EIO;
|
return -EIO;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
|
||||||
|
|
@ -529,7 +529,8 @@ static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
|
||||||
DEBUGP(5, dev, "NumRecBytes is valid\n");
|
DEBUGP(5, dev, "NumRecBytes is valid\n");
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
usleep_range(10000, 11000);
|
/* can not sleep as this is in atomic context */
|
||||||
|
mdelay(10);
|
||||||
}
|
}
|
||||||
if (i == 100) {
|
if (i == 100) {
|
||||||
DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
|
DEBUGP(5, dev, "Timeout waiting for NumRecBytes getting "
|
||||||
|
|
@ -549,7 +550,8 @@ static int set_protocol(struct cm4000_dev *dev, struct ptsreq *ptsreq)
|
||||||
}
|
}
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
usleep_range(10000, 11000);
|
/* can not sleep as this is in atomic context */
|
||||||
|
mdelay(10);
|
||||||
}
|
}
|
||||||
|
|
||||||
/* check whether it is a short PTS reply? */
|
/* check whether it is a short PTS reply? */
|
||||||
|
|
|
||||||
|
|
@ -483,7 +483,7 @@ static void* mgslpc_get_text_ptr(void)
|
||||||
return mgslpc_get_text_ptr;
|
return mgslpc_get_text_ptr;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* line discipline callback wrappers
|
* line discipline callback wrappers
|
||||||
*
|
*
|
||||||
* The wrappers maintain line discipline references
|
* The wrappers maintain line discipline references
|
||||||
|
|
@ -3855,7 +3855,7 @@ static void tx_timeout(struct timer_list *t)
|
||||||
|
|
||||||
#if SYNCLINK_GENERIC_HDLC
|
#if SYNCLINK_GENERIC_HDLC
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
|
* called by generic HDLC layer when protocol selected (PPP, frame relay, etc.)
|
||||||
* set encoding and frame check sequence (FCS) options
|
* set encoding and frame check sequence (FCS) options
|
||||||
*
|
*
|
||||||
|
|
@ -3908,7 +3908,7 @@ static int hdlcdev_attach(struct net_device *dev, unsigned short encoding,
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by generic HDLC layer to send frame
|
* called by generic HDLC layer to send frame
|
||||||
*
|
*
|
||||||
* skb socket buffer containing HDLC frame
|
* skb socket buffer containing HDLC frame
|
||||||
|
|
@ -3953,7 +3953,7 @@ static netdev_tx_t hdlcdev_xmit(struct sk_buff *skb,
|
||||||
return NETDEV_TX_OK;
|
return NETDEV_TX_OK;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by network layer when interface enabled
|
* called by network layer when interface enabled
|
||||||
* claim resources and initialize hardware
|
* claim resources and initialize hardware
|
||||||
*
|
*
|
||||||
|
|
@ -4016,7 +4016,7 @@ static int hdlcdev_open(struct net_device *dev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by network layer when interface is disabled
|
* called by network layer when interface is disabled
|
||||||
* shutdown hardware and release resources
|
* shutdown hardware and release resources
|
||||||
*
|
*
|
||||||
|
|
@ -4047,7 +4047,7 @@ static int hdlcdev_close(struct net_device *dev)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by network layer to process IOCTL call to network device
|
* called by network layer to process IOCTL call to network device
|
||||||
*
|
*
|
||||||
* dev pointer to network device structure
|
* dev pointer to network device structure
|
||||||
|
|
@ -4150,7 +4150,7 @@ static int hdlcdev_wan_ioctl(struct net_device *dev, struct if_settings *ifs)
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by network layer when transmit timeout is detected
|
* called by network layer when transmit timeout is detected
|
||||||
*
|
*
|
||||||
* dev pointer to network device structure
|
* dev pointer to network device structure
|
||||||
|
|
@ -4173,7 +4173,7 @@ static void hdlcdev_tx_timeout(struct net_device *dev, unsigned int txqueue)
|
||||||
netif_wake_queue(dev);
|
netif_wake_queue(dev);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by device driver when transmit completes
|
* called by device driver when transmit completes
|
||||||
* reenable network layer transmit if stopped
|
* reenable network layer transmit if stopped
|
||||||
*
|
*
|
||||||
|
|
@ -4185,7 +4185,7 @@ static void hdlcdev_tx_done(MGSLPC_INFO *info)
|
||||||
netif_wake_queue(info->netdev);
|
netif_wake_queue(info->netdev);
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by device driver when frame received
|
* called by device driver when frame received
|
||||||
* pass frame to network layer
|
* pass frame to network layer
|
||||||
*
|
*
|
||||||
|
|
@ -4225,7 +4225,7 @@ static const struct net_device_ops hdlcdev_ops = {
|
||||||
.ndo_tx_timeout = hdlcdev_tx_timeout,
|
.ndo_tx_timeout = hdlcdev_tx_timeout,
|
||||||
};
|
};
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by device driver when adding device instance
|
* called by device driver when adding device instance
|
||||||
* do generic HDLC initialization
|
* do generic HDLC initialization
|
||||||
*
|
*
|
||||||
|
|
@ -4273,7 +4273,7 @@ static int hdlcdev_init(MGSLPC_INFO *info)
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/*
|
||||||
* called by device driver when removing device instance
|
* called by device driver when removing device instance
|
||||||
* do generic HDLC cleanup
|
* do generic HDLC cleanup
|
||||||
*
|
*
|
||||||
|
|
|
||||||
|
|
@ -1666,9 +1666,8 @@ static void handle_control_message(struct virtio_device *vdev,
|
||||||
"Not enough space to store port name\n");
|
"Not enough space to store port name\n");
|
||||||
break;
|
break;
|
||||||
}
|
}
|
||||||
strncpy(port->name, buf->buf + buf->offset + sizeof(*cpkt),
|
strscpy(port->name, buf->buf + buf->offset + sizeof(*cpkt),
|
||||||
name_size - 1);
|
name_size);
|
||||||
port->name[name_size - 1] = 0;
|
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Since we only have one sysfs attribute, 'name',
|
* Since we only have one sysfs attribute, 'name',
|
||||||
|
|
|
||||||
|
|
@ -1,5 +1,5 @@
|
||||||
# SPDX-License-Identifier: GPL-2.0
|
# SPDX-License-Identifier: GPL-2.0
|
||||||
config COMEDI
|
menuconfig COMEDI
|
||||||
tristate "Data acquisition support (comedi)"
|
tristate "Data acquisition support (comedi)"
|
||||||
help
|
help
|
||||||
Enable support for a wide range of data acquisition devices
|
Enable support for a wide range of data acquisition devices
|
||||||
|
|
|
||||||
|
|
@ -1215,6 +1215,7 @@ static int check_insn_config_length(struct comedi_insn *insn,
|
||||||
case INSN_CONFIG_GET_CLOCK_SRC:
|
case INSN_CONFIG_GET_CLOCK_SRC:
|
||||||
case INSN_CONFIG_SET_OTHER_SRC:
|
case INSN_CONFIG_SET_OTHER_SRC:
|
||||||
case INSN_CONFIG_GET_COUNTER_STATUS:
|
case INSN_CONFIG_GET_COUNTER_STATUS:
|
||||||
|
case INSN_CONFIG_GET_PWM_OUTPUT:
|
||||||
case INSN_CONFIG_PWM_SET_H_BRIDGE:
|
case INSN_CONFIG_PWM_SET_H_BRIDGE:
|
||||||
case INSN_CONFIG_PWM_GET_H_BRIDGE:
|
case INSN_CONFIG_PWM_GET_H_BRIDGE:
|
||||||
case INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE:
|
case INSN_CONFIG_GET_HARDWARE_BUFFER_SIZE:
|
||||||
|
|
|
||||||
|
|
@ -29,6 +29,28 @@ config 104_QUAD_8
|
||||||
array module parameter. The interrupt line numbers for the devices may
|
array module parameter. The interrupt line numbers for the devices may
|
||||||
be configured via the irq array module parameter.
|
be configured via the irq array module parameter.
|
||||||
|
|
||||||
|
config FTM_QUADDEC
|
||||||
|
tristate "Flex Timer Module Quadrature decoder driver"
|
||||||
|
depends on SOC_LS1021A || COMPILE_TEST
|
||||||
|
depends on HAS_IOMEM && OF
|
||||||
|
help
|
||||||
|
Select this option to enable the Flex Timer Quadrature decoder
|
||||||
|
driver.
|
||||||
|
|
||||||
|
To compile this driver as a module, choose M here: the
|
||||||
|
module will be called ftm-quaddec.
|
||||||
|
|
||||||
|
config INTEL_QEP
|
||||||
|
tristate "Intel Quadrature Encoder Peripheral driver"
|
||||||
|
depends on X86
|
||||||
|
depends on PCI
|
||||||
|
help
|
||||||
|
Select this option to enable the Intel Quadrature Encoder Peripheral
|
||||||
|
driver.
|
||||||
|
|
||||||
|
To compile this driver as a module, choose M here: the module
|
||||||
|
will be called intel-qep.
|
||||||
|
|
||||||
config INTERRUPT_CNT
|
config INTERRUPT_CNT
|
||||||
tristate "Interrupt counter driver"
|
tristate "Interrupt counter driver"
|
||||||
depends on GPIOLIB
|
depends on GPIOLIB
|
||||||
|
|
@ -39,15 +61,17 @@ config INTERRUPT_CNT
|
||||||
To compile this driver as a module, choose M here: the
|
To compile this driver as a module, choose M here: the
|
||||||
module will be called interrupt-cnt.
|
module will be called interrupt-cnt.
|
||||||
|
|
||||||
config STM32_TIMER_CNT
|
config MICROCHIP_TCB_CAPTURE
|
||||||
tristate "STM32 Timer encoder counter driver"
|
tristate "Microchip Timer Counter Capture driver"
|
||||||
depends on MFD_STM32_TIMERS || COMPILE_TEST
|
depends on SOC_AT91SAM9 || SOC_SAM_V7 || COMPILE_TEST
|
||||||
|
depends on HAS_IOMEM && OF
|
||||||
|
select REGMAP_MMIO
|
||||||
help
|
help
|
||||||
Select this option to enable STM32 Timer quadrature encoder
|
Select this option to enable the Microchip Timer Counter Block
|
||||||
and counter driver.
|
capture driver.
|
||||||
|
|
||||||
To compile this driver as a module, choose M here: the
|
To compile this driver as a module, choose M here: the
|
||||||
module will be called stm32-timer-cnt.
|
module will be called microchip-tcb-capture.
|
||||||
|
|
||||||
config STM32_LPTIMER_CNT
|
config STM32_LPTIMER_CNT
|
||||||
tristate "STM32 LP Timer encoder counter driver"
|
tristate "STM32 LP Timer encoder counter driver"
|
||||||
|
|
@ -59,47 +83,15 @@ config STM32_LPTIMER_CNT
|
||||||
To compile this driver as a module, choose M here: the
|
To compile this driver as a module, choose M here: the
|
||||||
module will be called stm32-lptimer-cnt.
|
module will be called stm32-lptimer-cnt.
|
||||||
|
|
||||||
config TI_EQEP
|
config STM32_TIMER_CNT
|
||||||
tristate "TI eQEP counter driver"
|
tristate "STM32 Timer encoder counter driver"
|
||||||
depends on (SOC_AM33XX || COMPILE_TEST)
|
depends on MFD_STM32_TIMERS || COMPILE_TEST
|
||||||
select REGMAP_MMIO
|
|
||||||
help
|
help
|
||||||
Select this option to enable the Texas Instruments Enhanced Quadrature
|
Select this option to enable STM32 Timer quadrature encoder
|
||||||
Encoder Pulse (eQEP) counter driver.
|
and counter driver.
|
||||||
|
|
||||||
To compile this driver as a module, choose M here: the module will be
|
|
||||||
called ti-eqep.
|
|
||||||
|
|
||||||
config FTM_QUADDEC
|
|
||||||
tristate "Flex Timer Module Quadrature decoder driver"
|
|
||||||
depends on HAS_IOMEM && OF
|
|
||||||
help
|
|
||||||
Select this option to enable the Flex Timer Quadrature decoder
|
|
||||||
driver.
|
|
||||||
|
|
||||||
To compile this driver as a module, choose M here: the
|
To compile this driver as a module, choose M here: the
|
||||||
module will be called ftm-quaddec.
|
module will be called stm32-timer-cnt.
|
||||||
|
|
||||||
config MICROCHIP_TCB_CAPTURE
|
|
||||||
tristate "Microchip Timer Counter Capture driver"
|
|
||||||
depends on HAS_IOMEM && OF
|
|
||||||
select REGMAP_MMIO
|
|
||||||
help
|
|
||||||
Select this option to enable the Microchip Timer Counter Block
|
|
||||||
capture driver.
|
|
||||||
|
|
||||||
To compile this driver as a module, choose M here: the
|
|
||||||
module will be called microchip-tcb-capture.
|
|
||||||
|
|
||||||
config INTEL_QEP
|
|
||||||
tristate "Intel Quadrature Encoder Peripheral driver"
|
|
||||||
depends on PCI
|
|
||||||
help
|
|
||||||
Select this option to enable the Intel Quadrature Encoder Peripheral
|
|
||||||
driver.
|
|
||||||
|
|
||||||
To compile this driver as a module, choose M here: the module
|
|
||||||
will be called intel-qep.
|
|
||||||
|
|
||||||
config TI_ECAP_CAPTURE
|
config TI_ECAP_CAPTURE
|
||||||
tristate "TI eCAP capture driver"
|
tristate "TI eCAP capture driver"
|
||||||
|
|
@ -116,4 +108,15 @@ config TI_ECAP_CAPTURE
|
||||||
To compile this driver as a module, choose M here: the module
|
To compile this driver as a module, choose M here: the module
|
||||||
will be called ti-ecap-capture.
|
will be called ti-ecap-capture.
|
||||||
|
|
||||||
|
config TI_EQEP
|
||||||
|
tristate "TI eQEP counter driver"
|
||||||
|
depends on (SOC_AM33XX || COMPILE_TEST)
|
||||||
|
select REGMAP_MMIO
|
||||||
|
help
|
||||||
|
Select this option to enable the Texas Instruments Enhanced Quadrature
|
||||||
|
Encoder Pulse (eQEP) counter driver.
|
||||||
|
|
||||||
|
To compile this driver as a module, choose M here: the module will be
|
||||||
|
called ti-eqep.
|
||||||
|
|
||||||
endif # COUNTER
|
endif # COUNTER
|
||||||
|
|
|
||||||
|
|
@ -357,6 +357,16 @@ struct hisi_qm_resource {
|
||||||
struct list_head list;
|
struct list_head list;
|
||||||
};
|
};
|
||||||
|
|
||||||
|
/**
|
||||||
|
* struct qm_hw_err - Structure describing the device errors
|
||||||
|
* @list: hardware error list
|
||||||
|
* @timestamp: timestamp when the error occurred
|
||||||
|
*/
|
||||||
|
struct qm_hw_err {
|
||||||
|
struct list_head list;
|
||||||
|
unsigned long long timestamp;
|
||||||
|
};
|
||||||
|
|
||||||
struct hisi_qm_hw_ops {
|
struct hisi_qm_hw_ops {
|
||||||
int (*get_vft)(struct hisi_qm *qm, u32 *base, u32 *number);
|
int (*get_vft)(struct hisi_qm *qm, u32 *base, u32 *number);
|
||||||
void (*qm_db)(struct hisi_qm *qm, u16 qn,
|
void (*qm_db)(struct hisi_qm *qm, u16 qn,
|
||||||
|
|
@ -2458,6 +2468,113 @@ static long hisi_qm_uacce_ioctl(struct uacce_queue *q, unsigned int cmd,
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* qm_hw_err_isolate() - Try to set the isolation status of the uacce device
|
||||||
|
* according to user's configuration of error threshold.
|
||||||
|
* @qm: the uacce device
|
||||||
|
*/
|
||||||
|
static int qm_hw_err_isolate(struct hisi_qm *qm)
|
||||||
|
{
|
||||||
|
struct qm_hw_err *err, *tmp, *hw_err;
|
||||||
|
struct qm_err_isolate *isolate;
|
||||||
|
u32 count = 0;
|
||||||
|
|
||||||
|
isolate = &qm->isolate_data;
|
||||||
|
|
||||||
|
#define SECONDS_PER_HOUR 3600
|
||||||
|
|
||||||
|
/* All the hw errs are processed by PF driver */
|
||||||
|
if (qm->uacce->is_vf || isolate->is_isolate || !isolate->err_threshold)
|
||||||
|
return 0;
|
||||||
|
|
||||||
|
hw_err = kzalloc(sizeof(*hw_err), GFP_KERNEL);
|
||||||
|
if (!hw_err)
|
||||||
|
return -ENOMEM;
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Time-stamp every slot AER error. Then check the AER error log when the
|
||||||
|
* next device AER error occurred. if the device slot AER error count exceeds
|
||||||
|
* the setting error threshold in one hour, the isolated state will be set
|
||||||
|
* to true. And the AER error logs that exceed one hour will be cleared.
|
||||||
|
*/
|
||||||
|
mutex_lock(&isolate->isolate_lock);
|
||||||
|
hw_err->timestamp = jiffies;
|
||||||
|
list_for_each_entry_safe(err, tmp, &isolate->qm_hw_errs, list) {
|
||||||
|
if ((hw_err->timestamp - err->timestamp) / HZ >
|
||||||
|
SECONDS_PER_HOUR) {
|
||||||
|
list_del(&err->list);
|
||||||
|
kfree(err);
|
||||||
|
} else {
|
||||||
|
count++;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
list_add(&hw_err->list, &isolate->qm_hw_errs);
|
||||||
|
mutex_unlock(&isolate->isolate_lock);
|
||||||
|
|
||||||
|
if (count >= isolate->err_threshold)
|
||||||
|
isolate->is_isolate = true;
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static void qm_hw_err_destroy(struct hisi_qm *qm)
|
||||||
|
{
|
||||||
|
struct qm_hw_err *err, *tmp;
|
||||||
|
|
||||||
|
mutex_lock(&qm->isolate_data.isolate_lock);
|
||||||
|
list_for_each_entry_safe(err, tmp, &qm->isolate_data.qm_hw_errs, list) {
|
||||||
|
list_del(&err->list);
|
||||||
|
kfree(err);
|
||||||
|
}
|
||||||
|
mutex_unlock(&qm->isolate_data.isolate_lock);
|
||||||
|
}
|
||||||
|
|
||||||
|
static enum uacce_dev_state hisi_qm_get_isolate_state(struct uacce_device *uacce)
|
||||||
|
{
|
||||||
|
struct hisi_qm *qm = uacce->priv;
|
||||||
|
struct hisi_qm *pf_qm;
|
||||||
|
|
||||||
|
if (uacce->is_vf)
|
||||||
|
pf_qm = pci_get_drvdata(pci_physfn(qm->pdev));
|
||||||
|
else
|
||||||
|
pf_qm = qm;
|
||||||
|
|
||||||
|
return pf_qm->isolate_data.is_isolate ?
|
||||||
|
UACCE_DEV_ISOLATE : UACCE_DEV_NORMAL;
|
||||||
|
}
|
||||||
|
|
||||||
|
static int hisi_qm_isolate_threshold_write(struct uacce_device *uacce, u32 num)
|
||||||
|
{
|
||||||
|
struct hisi_qm *qm = uacce->priv;
|
||||||
|
|
||||||
|
/* Must be set by PF */
|
||||||
|
if (uacce->is_vf)
|
||||||
|
return -EPERM;
|
||||||
|
|
||||||
|
if (qm->isolate_data.is_isolate)
|
||||||
|
return -EPERM;
|
||||||
|
|
||||||
|
qm->isolate_data.err_threshold = num;
|
||||||
|
|
||||||
|
/* After the policy is updated, need to reset the hardware err list */
|
||||||
|
qm_hw_err_destroy(qm);
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
static u32 hisi_qm_isolate_threshold_read(struct uacce_device *uacce)
|
||||||
|
{
|
||||||
|
struct hisi_qm *qm = uacce->priv;
|
||||||
|
struct hisi_qm *pf_qm;
|
||||||
|
|
||||||
|
if (uacce->is_vf) {
|
||||||
|
pf_qm = pci_get_drvdata(pci_physfn(qm->pdev));
|
||||||
|
return pf_qm->isolate_data.err_threshold;
|
||||||
|
}
|
||||||
|
|
||||||
|
return qm->isolate_data.err_threshold;
|
||||||
|
}
|
||||||
|
|
||||||
static const struct uacce_ops uacce_qm_ops = {
|
static const struct uacce_ops uacce_qm_ops = {
|
||||||
.get_available_instances = hisi_qm_get_available_instances,
|
.get_available_instances = hisi_qm_get_available_instances,
|
||||||
.get_queue = hisi_qm_uacce_get_queue,
|
.get_queue = hisi_qm_uacce_get_queue,
|
||||||
|
|
@ -2467,8 +2584,22 @@ static const struct uacce_ops uacce_qm_ops = {
|
||||||
.mmap = hisi_qm_uacce_mmap,
|
.mmap = hisi_qm_uacce_mmap,
|
||||||
.ioctl = hisi_qm_uacce_ioctl,
|
.ioctl = hisi_qm_uacce_ioctl,
|
||||||
.is_q_updated = hisi_qm_is_q_updated,
|
.is_q_updated = hisi_qm_is_q_updated,
|
||||||
|
.get_isolate_state = hisi_qm_get_isolate_state,
|
||||||
|
.isolate_err_threshold_write = hisi_qm_isolate_threshold_write,
|
||||||
|
.isolate_err_threshold_read = hisi_qm_isolate_threshold_read,
|
||||||
};
|
};
|
||||||
|
|
||||||
|
static void qm_remove_uacce(struct hisi_qm *qm)
|
||||||
|
{
|
||||||
|
struct uacce_device *uacce = qm->uacce;
|
||||||
|
|
||||||
|
if (qm->use_sva) {
|
||||||
|
qm_hw_err_destroy(qm);
|
||||||
|
uacce_remove(uacce);
|
||||||
|
qm->uacce = NULL;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static int qm_alloc_uacce(struct hisi_qm *qm)
|
static int qm_alloc_uacce(struct hisi_qm *qm)
|
||||||
{
|
{
|
||||||
struct pci_dev *pdev = qm->pdev;
|
struct pci_dev *pdev = qm->pdev;
|
||||||
|
|
@ -2495,8 +2626,7 @@ static int qm_alloc_uacce(struct hisi_qm *qm)
|
||||||
qm->use_sva = true;
|
qm->use_sva = true;
|
||||||
} else {
|
} else {
|
||||||
/* only consider sva case */
|
/* only consider sva case */
|
||||||
uacce_remove(uacce);
|
qm_remove_uacce(qm);
|
||||||
qm->uacce = NULL;
|
|
||||||
return -EINVAL;
|
return -EINVAL;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
@ -2529,6 +2659,8 @@ static int qm_alloc_uacce(struct hisi_qm *qm)
|
||||||
uacce->qf_pg_num[UACCE_QFRT_DUS] = dus_page_nr;
|
uacce->qf_pg_num[UACCE_QFRT_DUS] = dus_page_nr;
|
||||||
|
|
||||||
qm->uacce = uacce;
|
qm->uacce = uacce;
|
||||||
|
INIT_LIST_HEAD(&qm->isolate_data.qm_hw_errs);
|
||||||
|
mutex_init(&qm->isolate_data.isolate_lock);
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|
@ -4017,6 +4149,12 @@ static int qm_controller_reset_prepare(struct hisi_qm *qm)
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
if (qm->use_sva) {
|
||||||
|
ret = qm_hw_err_isolate(qm);
|
||||||
|
if (ret)
|
||||||
|
pci_err(pdev, "failed to isolate hw err!\n");
|
||||||
|
}
|
||||||
|
|
||||||
ret = qm_wait_vf_prepare_finish(qm);
|
ret = qm_wait_vf_prepare_finish(qm);
|
||||||
if (ret)
|
if (ret)
|
||||||
pci_err(pdev, "failed to stop by vfs in soft reset!\n");
|
pci_err(pdev, "failed to stop by vfs in soft reset!\n");
|
||||||
|
|
@ -4321,21 +4459,25 @@ static int qm_controller_reset(struct hisi_qm *qm)
|
||||||
qm->err_ini->show_last_dfx_regs(qm);
|
qm->err_ini->show_last_dfx_regs(qm);
|
||||||
|
|
||||||
ret = qm_soft_reset(qm);
|
ret = qm_soft_reset(qm);
|
||||||
if (ret) {
|
if (ret)
|
||||||
pci_err(pdev, "Controller reset failed (%d)\n", ret);
|
goto err_reset;
|
||||||
qm_reset_bit_clear(qm);
|
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
ret = qm_controller_reset_done(qm);
|
ret = qm_controller_reset_done(qm);
|
||||||
if (ret) {
|
if (ret)
|
||||||
qm_reset_bit_clear(qm);
|
goto err_reset;
|
||||||
return ret;
|
|
||||||
}
|
|
||||||
|
|
||||||
pci_info(pdev, "Controller reset complete\n");
|
pci_info(pdev, "Controller reset complete\n");
|
||||||
|
|
||||||
return 0;
|
return 0;
|
||||||
|
|
||||||
|
err_reset:
|
||||||
|
pci_err(pdev, "Controller reset failed (%d)\n", ret);
|
||||||
|
qm_reset_bit_clear(qm);
|
||||||
|
|
||||||
|
/* if resetting fails, isolate the device */
|
||||||
|
if (qm->use_sva)
|
||||||
|
qm->isolate_data.is_isolate = true;
|
||||||
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
|
|
@ -5255,10 +5397,7 @@ int hisi_qm_init(struct hisi_qm *qm)
|
||||||
err_free_qm_memory:
|
err_free_qm_memory:
|
||||||
hisi_qm_memory_uninit(qm);
|
hisi_qm_memory_uninit(qm);
|
||||||
err_alloc_uacce:
|
err_alloc_uacce:
|
||||||
if (qm->use_sva) {
|
qm_remove_uacce(qm);
|
||||||
uacce_remove(qm->uacce);
|
|
||||||
qm->uacce = NULL;
|
|
||||||
}
|
|
||||||
err_irq_register:
|
err_irq_register:
|
||||||
qm_irqs_unregister(qm);
|
qm_irqs_unregister(qm);
|
||||||
err_pci_init:
|
err_pci_init:
|
||||||
|
|
|
||||||
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue