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arm64: dts: renesas: Add initial device tree for RZ/G2L SMARC EVK 

Add basic support for RZ/G2L SMARC EVK (based on R9A07G044L2):
- memory
- External input clock
- SCIF

Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Biju Das <biju.das.jz@bp.renesas.com>
Link: https://lore.kernel.org/r/20210609153230.6967-12-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
This commit is contained in:
Lad Prabhakar 2021-06-09 16:32:30 +01:00 committed by Geert Uytterhoeven
parent 68a4552529
commit 690ea5d394
3 changed files with 50 additions and 0 deletions
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2
arch/arm64/boot/dts/renesas/Makefile
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@ -62,3 +62,5 @@ dtb-$(CONFIG_ARCH_R8A77990) += r8a77990-ebisu.dtb
dtb-$(CONFIG_ARCH_R8A77995) += r8a77995-draak.dtb
dtb-$(CONFIG_ARCH_R8A779A0) += r8a779a0-falcon.dtb
dtb-$(CONFIG_ARCH_R9A07G044) += r9a07g044l2-smarc.dtb

21
arch/arm64/boot/dts/renesas/r9a07g044l2-smarc.dts Normal file
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@ -0,0 +1,21 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2L SMARC EVK board
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
/dts-v1/;
#include "r9a07g044l2.dtsi"
#include "rzg2l-smarc.dtsi"
/ {
model = "Renesas SMARC EVK based on r9a07g044l2";
compatible = "renesas,smarc-evk", "renesas,r9a07g044l2", "renesas,r9a07g044";
memory@48000000 {
device_type = "memory";
/* first 128MB is reserved for secure area. */
reg = <0x0 0x48000000 0x0 0x78000000>;
};
};

27
arch/arm64/boot/dts/renesas/rzg2l-smarc.dtsi Normal file
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@ -0,0 +1,27 @@
// SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
/*
* Device Tree Source for the RZ/G2L SMARC EVK common parts
*
* Copyright (C) 2021 Renesas Electronics Corp.
*/
#include <dt-bindings/gpio/gpio.h>
/ {
aliases {
serial0 = &scif0;
};
chosen {
bootargs = "ignore_loglevel";
stdout-path = "serial0:115200n8";
};
};
&extal_clk {
clock-frequency = <24000000>;
};
&scif0 {
status = "okay";
};