e1000e: Add Support for 38.4MHZ frequency
Add support for 38.4MHz frequency is required for PTP on CannonLake. SYSTIM frequency adjustment attributes for TIMINCA are get/set dependent on the hardware clock frequency for a different types of adapters. 38.4MHz frequency supported by CannonLake and active once time synchronisation mechanism was enabled Changed abbreviation from Hz to HZ to be compliant checkpatch code style Signed-off-by: Sasha Neftin <sasha.neftin@intel.com> Reviewed-by: Raanan Avargil <raanan.avargil@intel.com> Reviewed-by: Dima Ruinskiy <dima.ruinskiy@intel.com> Tested-by: Aaron Brown <aaron.f.brown@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
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@ -379,18 +379,22 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca);
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* INCVALUE_n into the TIMINCA register allowing 32+8+(24-INCVALUE_SHIFT_n)
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* bits to count nanoseconds leaving the rest for fractional nonseconds.
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*/
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#define INCVALUE_96MHz 125
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#define INCVALUE_SHIFT_96MHz 17
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#define INCPERIOD_SHIFT_96MHz 2
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#define INCPERIOD_96MHz (12 >> INCPERIOD_SHIFT_96MHz)
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#define INCVALUE_96MHZ 125
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#define INCVALUE_SHIFT_96MHZ 17
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#define INCPERIOD_SHIFT_96MHZ 2
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#define INCPERIOD_96MHZ (12 >> INCPERIOD_SHIFT_96MHZ)
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#define INCVALUE_25MHz 40
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#define INCVALUE_SHIFT_25MHz 18
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#define INCPERIOD_25MHz 1
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#define INCVALUE_25MHZ 40
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#define INCVALUE_SHIFT_25MHZ 18
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#define INCPERIOD_25MHZ 1
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#define INCVALUE_24MHz 125
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#define INCVALUE_SHIFT_24MHz 14
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#define INCPERIOD_24MHz 3
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#define INCVALUE_24MHZ 125
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#define INCVALUE_SHIFT_24MHZ 14
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#define INCPERIOD_24MHZ 3
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#define INCVALUE_38400KHZ 26
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#define INCVALUE_SHIFT_38400KHZ 19
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#define INCPERIOD_38400KHZ 1
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/* Another drawback of scaling the incvalue by a large factor is the
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* 64-bit SYSTIM register overflows more quickly. This is dealt with
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@ -3509,42 +3509,57 @@ s32 e1000e_get_base_timinca(struct e1000_adapter *adapter, u32 *timinca)
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switch (hw->mac.type) {
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case e1000_pch2lan:
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/* Stable 96MHz frequency */
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incperiod = INCPERIOD_96MHz;
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incvalue = INCVALUE_96MHz;
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shift = INCVALUE_SHIFT_96MHz;
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adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
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incperiod = INCPERIOD_96MHZ;
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incvalue = INCVALUE_96MHZ;
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shift = INCVALUE_SHIFT_96MHZ;
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adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
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break;
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case e1000_pch_lpt:
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if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
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/* Stable 96MHz frequency */
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incperiod = INCPERIOD_96MHz;
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incvalue = INCVALUE_96MHz;
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shift = INCVALUE_SHIFT_96MHz;
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adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHz;
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incperiod = INCPERIOD_96MHZ;
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incvalue = INCVALUE_96MHZ;
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shift = INCVALUE_SHIFT_96MHZ;
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adapter->cc.shift = shift + INCPERIOD_SHIFT_96MHZ;
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} else {
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/* Stable 25MHz frequency */
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incperiod = INCPERIOD_25MHz;
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incvalue = INCVALUE_25MHz;
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shift = INCVALUE_SHIFT_25MHz;
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incperiod = INCPERIOD_25MHZ;
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incvalue = INCVALUE_25MHZ;
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shift = INCVALUE_SHIFT_25MHZ;
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adapter->cc.shift = shift;
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}
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break;
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case e1000_pch_spt:
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if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
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/* Stable 24MHz frequency */
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incperiod = INCPERIOD_24MHz;
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incvalue = INCVALUE_24MHz;
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shift = INCVALUE_SHIFT_24MHz;
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incperiod = INCPERIOD_24MHZ;
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incvalue = INCVALUE_24MHZ;
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shift = INCVALUE_SHIFT_24MHZ;
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adapter->cc.shift = shift;
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break;
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}
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return -EINVAL;
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case e1000_pch_cnp:
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if (er32(TSYNCRXCTL) & E1000_TSYNCRXCTL_SYSCFI) {
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/* Stable 24MHz frequency */
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incperiod = INCPERIOD_24MHZ;
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incvalue = INCVALUE_24MHZ;
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shift = INCVALUE_SHIFT_24MHZ;
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adapter->cc.shift = shift;
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} else {
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/* Stable 38400KHz frequency */
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incperiod = INCPERIOD_38400KHZ;
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incvalue = INCVALUE_38400KHZ;
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shift = INCVALUE_SHIFT_38400KHZ;
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adapter->cc.shift = shift;
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}
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break;
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case e1000_82574:
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case e1000_82583:
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/* Stable 25MHz frequency */
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incperiod = INCPERIOD_25MHz;
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incvalue = INCVALUE_25MHz;
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shift = INCVALUE_SHIFT_25MHz;
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incperiod = INCPERIOD_25MHZ;
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incvalue = INCVALUE_25MHZ;
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shift = INCVALUE_SHIFT_25MHZ;
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adapter->cc.shift = shift;
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break;
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default:
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