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drm/amdgpu/powerplay: add smu smc_table_manager callback for vega12 

For consistency with other asics.

Reviewed-by: Rex Zhu <Rex.Zhu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2018-09-20 21:15:39 -05:00
parent 0b2c0a12cb
commit 68e841abf8
3 changed files with 22 additions and 12 deletions
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8
drivers/gpu/drm/amd/powerplay/hwmgr/vega12_hwmgr.c
View File

@ -745,8 +745,8 @@ static int vega12_init_smc_table(struct pp_hwmgr *hwmgr)
memcpy(pp_table, pptable_information->smc_pptable, sizeof(PPTable_t));
result = vega12_copy_table_to_smc(hwmgr,
(uint8_t *)pp_table, TABLE_PPTABLE);
result = smum_smc_table_manager(hwmgr,
(uint8_t *)pp_table, TABLE_PPTABLE, false);
PP_ASSERT_WITH_CODE(!result,
"Failed to upload PPtable!", return result);
@ -2103,8 +2103,8 @@ static int vega12_display_configuration_changed_task(struct pp_hwmgr *hwmgr)
if ((data->water_marks_bitmap & WaterMarksExist) &&
!(data->water_marks_bitmap & WaterMarksLoaded)) {
result = vega12_copy_table_to_smc(hwmgr,
(uint8_t *)wm_table, TABLE_WATERMARKS);
result = smum_smc_table_manager(hwmgr,
(uint8_t *)wm_table, TABLE_WATERMARKS, false);
PP_ASSERT_WITH_CODE(result, "Failed to update WMTABLE!", return EINVAL);
data->water_marks_bitmap |= WaterMarksLoaded;
}

22
drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.c
View File

@ -37,8 +37,8 @@
* @param hwmgr the address of the HW manager
* @param table_id the driver's table ID to copy from
*/
int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id)
static int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id)
{
struct vega12_smumgr *priv =
(struct vega12_smumgr *)(hwmgr->smu_backend);
@ -75,8 +75,8 @@ int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
* @param hwmgr the address of the HW manager
* @param table_id the table to copy from
*/
int vega12_copy_table_to_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id)
static int vega12_copy_table_to_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id)
{
struct vega12_smumgr *priv =
(struct vega12_smumgr *)(hwmgr->smu_backend);
@ -351,6 +351,19 @@ static int vega12_start_smu(struct pp_hwmgr *hwmgr)
return 0;
}
static int vega12_smc_table_manager(struct pp_hwmgr *hwmgr, uint8_t *table,
uint16_t table_id, bool rw)
{
int ret;
if (rw)
ret = vega12_copy_table_from_smc(hwmgr, table, table_id);
else
ret = vega12_copy_table_to_smc(hwmgr, table, table_id);
return ret;
}
const struct pp_smumgr_func vega12_smu_funcs = {
.smu_init = &vega12_smu_init,
.smu_fini = &vega12_smu_fini,
@ -362,4 +375,5 @@ const struct pp_smumgr_func vega12_smu_funcs = {
.upload_pptable_settings = NULL,
.is_dpm_running = vega12_is_dpm_running,
.get_argument = smu9_get_argument,
.smc_table_manager = vega12_smc_table_manager,
};

4
drivers/gpu/drm/amd/powerplay/smumgr/vega12_smumgr.h
View File

@ -48,10 +48,6 @@ struct vega12_smumgr {
#define SMU_FEATURES_HIGH_MASK 0xFFFFFFFF00000000
#define SMU_FEATURES_HIGH_SHIFT 32
int vega12_copy_table_from_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id);
int vega12_copy_table_to_smc(struct pp_hwmgr *hwmgr,
uint8_t *table, int16_t table_id);
int vega12_enable_smc_features(struct pp_hwmgr *hwmgr,
bool enable, uint64_t feature_mask);
int vega12_get_enabled_smc_features(struct pp_hwmgr *hwmgr,