clk: qcom: dispcc-qcm2290: Remove inexistent DSI1PHY clk
There's only one DSI PHY on this SoC. Remove the ghost entry for the
clock produced by a secondary one.
Fixes: cc517ea333
("clk: qcom: Add display clock controller driver for QCM2290")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230412-topic-qcm_dispcc-v1-2-bf2989a75ae4@linaro.org
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@ -27,7 +27,6 @@ enum {
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P_DISP_CC_PLL0_OUT_MAIN,
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P_DSI0_PHY_PLL_OUT_BYTECLK,
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P_DSI0_PHY_PLL_OUT_DSICLK,
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P_DSI1_PHY_PLL_OUT_DSICLK,
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P_GPLL0_OUT_MAIN,
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P_SLEEP_CLK,
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};
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@ -107,13 +106,11 @@ static const struct clk_parent_data disp_cc_parent_data_3[] = {
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static const struct parent_map disp_cc_parent_map_4[] = {
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{ P_BI_TCXO, 0 },
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{ P_DSI0_PHY_PLL_OUT_DSICLK, 1 },
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{ P_DSI1_PHY_PLL_OUT_DSICLK, 2 },
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};
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static const struct clk_parent_data disp_cc_parent_data_4[] = {
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{ .fw_name = "bi_tcxo" },
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{ .fw_name = "dsi0_phy_pll_out_dsiclk" },
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{ .fw_name = "dsi1_phy_pll_out_dsiclk" },
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};
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static const struct parent_map disp_cc_parent_map_5[] = {
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