UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

b43: Port spec bugfixes for the LP baseband init 

A few bugs were fixed in the LP baseband init specs.

Signed-off-by: Michael Buesch <mb@bu3sch.de>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Michael Buesch 2009-02-03 19:36:45 +01:00 committed by John W. Linville
parent c970314615
commit 686aa5f213
1 changed files with 11 additions and 14 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

25
drivers/net/wireless/b43/phy_lp.c
View File

@ -70,6 +70,7 @@ static void lpphy_baseband_rev0_1_init(struct b43_wldev *dev)
static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev) static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
{ {
struct ssb_bus *bus = dev->dev->bus;
struct b43_phy_lp *lpphy = dev->phy.lp; struct b43_phy_lp *lpphy = dev->phy.lp;
b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50); b43_phy_write(dev, B43_LPPHY_AFE_DAC_CTL, 0x50);
@ -89,7 +90,7 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000); b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x4000);
b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000); b43_phy_mask(dev, B43_LPPHY_CRSGAIN_CTL, ~0x2000);
b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1); b43_phy_set(dev, B43_PHY_OFDM(0x10A), 0x1);
b43_phy_maskset(dev, B43_LPPHY_CCKLMSSTEPSIZE, 0xFF01, 0x10); b43_phy_maskset(dev, B43_PHY_OFDM(0x10A), 0xFF01, 0x10);
b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4); b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0xFF00, 0xF4);
b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100); b43_phy_maskset(dev, B43_PHY_OFDM(0xDF), 0x00FF, 0xF100);
b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48); b43_phy_write(dev, B43_LPPHY_CLIPTHRESH, 0x48);
@ -101,8 +102,13 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xF81F, 0xA0); b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xF81F, 0xA0);
b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300); b43_phy_maskset(dev, B43_LPPHY_GAINDIRECTMISMATCH, 0xE0FF, 0x300);
b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00); b43_phy_maskset(dev, B43_LPPHY_HIGAINDB, 0x00FF, 0x2A00);
b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00); if ((bus->chip_id == 0x4325) && (bus->chip_rev == 0)) {
b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD); b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x2100);
b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xA);
} else {
b43_phy_maskset(dev, B43_LPPHY_LOWGAINDB, 0x00FF, 0x1E00);
b43_phy_maskset(dev, B43_LPPHY_VERYLOWGAINDB, 0xFF00, 0xD);
}
b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F); b43_phy_maskset(dev, B43_PHY_OFDM(0xFE), 0xFFE0, 0x1F);
b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC); b43_phy_maskset(dev, B43_PHY_OFDM(0xFF), 0xFFE0, 0xC);
b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19); b43_phy_maskset(dev, B43_PHY_OFDM(0x100), 0xFF00, 0x19);
@ -114,17 +120,8 @@ static void lpphy_baseband_rev2plus_init(struct b43_wldev *dev)
b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12); b43_phy_maskset(dev, B43_LPPHY_CLIPCTRTHRESH, 0xFFE0, 0x12);
b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000); b43_phy_maskset(dev, B43_LPPHY_GAINMISMATCH, 0x0FFF, 0x9000);
if (dev->phy.rev < 2) { b43_lptab_write(dev, B43_LPTAB16(0x08, 0x14), 0);
//FIXME this will never execute. b43_lptab_write(dev, B43_LPTAB16(0x08, 0x12), 0x40);
//FIXME 32bit?
b43_lptab_write(dev, B43_LPTAB32(0x11, 0x14), 0);
b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40);
} else {
//FIXME 32bit?
b43_lptab_write(dev, B43_LPTAB32(0x08, 0x14), 0);
b43_lptab_write(dev, B43_LPTAB32(0x08, 0x12), 0x40);
}
if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) { if (b43_current_band(dev->wl) == IEEE80211_BAND_2GHZ) {
b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40); b43_phy_set(dev, B43_LPPHY_CRSGAIN_CTL, 0x40);