Fix initialization. Unbreak the wait-for-completion loops. Code cleanup.
Signed-off-by: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -207,30 +207,32 @@ typedef struct dmadscr_s {
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u64 pad_b;
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} dmadscr_t;
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static dmadscr_t page_descr[NR_CPUS] __attribute__((aligned(SMP_CACHE_BYTES)));
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static dmadscr_t page_descr[DM_NUM_CHANNELS] __attribute__((aligned(SMP_CACHE_BYTES)));
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void sb1_dma_init(void)
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{
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int cpu = smp_processor_id();
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u64 base_val = CPHYSADDR(&page_descr[cpu]) | V_DM_DSCR_BASE_RINGSZ(1);
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int i;
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__raw_writeq(base_val,
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IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
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__raw_writeq(base_val | M_DM_DSCR_BASE_RESET,
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IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
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__raw_writeq(base_val | M_DM_DSCR_BASE_ENABL,
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IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
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for (i = 0; i < DM_NUM_CHANNELS; i++) {
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u64 base_val = (u64)CPHYSADDR(&page_descr[i]) | V_DM_DSCR_BASE_RINGSZ(1);
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void *base_reg = (void *)IOADDR(A_DM_REGISTER(i, R_DM_DSCR_BASE));
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__raw_writeq(base_val, base_reg);
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__raw_writeq(base_val | M_DM_DSCR_BASE_RESET, base_reg);
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__raw_writeq(base_val | M_DM_DSCR_BASE_ENABL, base_reg);
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}
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}
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void clear_page(void *page)
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{
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int cpu = smp_processor_id();
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u64 to_phys = (u64)CPHYSADDR(page);
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unsigned int cpu = smp_processor_id();
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/* if the page is above Kseg0, use old way */
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/* if the page is not in KSEG0, use old way */
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if ((long)KSEGX(page) != (long)CKSEG0)
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return clear_page_cpu(page);
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page_descr[cpu].dscr_a = CPHYSADDR(page) | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
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page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_ZERO_MEM | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
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page_descr[cpu].dscr_b = V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
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__raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
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@ -239,32 +241,32 @@ void clear_page(void *page)
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* reliable way to delay completion detection.
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*/
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while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
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M_DM_DSCR_BASE_INTERRUPT)))
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& M_DM_DSCR_BASE_INTERRUPT))
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;
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__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
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}
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void copy_page(void *to, void *from)
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{
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unsigned long from_phys = CPHYSADDR(from);
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unsigned long to_phys = CPHYSADDR(to);
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int cpu = smp_processor_id();
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u64 from_phys = (u64)CPHYSADDR(from);
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u64 to_phys = (u64)CPHYSADDR(to);
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unsigned int cpu = smp_processor_id();
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/* if either page is above Kseg0, use old way */
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/* if any page is not in KSEG0, use old way */
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if ((long)KSEGX(to) != (long)CKSEG0
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|| (long)KSEGX(from) != (long)CKSEG0)
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return copy_page_cpu(to, from);
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page_descr[cpu].dscr_a = CPHYSADDR(to_phys) | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
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page_descr[cpu].dscr_b = CPHYSADDR(from_phys) | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
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__raw_writeq(1, IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
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page_descr[cpu].dscr_a = to_phys | M_DM_DSCRA_L2C_DEST | M_DM_DSCRA_INTERRUPT;
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page_descr[cpu].dscr_b = from_phys | V_DM_DSCRB_SRC_LENGTH(PAGE_SIZE);
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__raw_writeq(1, (void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_COUNT)));
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/*
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* Don't really want to do it this way, but there's no
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* reliable way to delay completion detection.
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*/
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while (!(__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)) &
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M_DM_DSCR_BASE_INTERRUPT)))
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while (!(__raw_readq((void *)IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE_DEBUG)))
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& M_DM_DSCR_BASE_INTERRUPT))
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;
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__raw_readq(IOADDR(A_DM_REGISTER(cpu, R_DM_DSCR_BASE)));
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}
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