media: ov5640: fix support of BT656 bus mode
Fix PCLK polarity not being taken into account.
Add comments about BT656 register control.
Remove useless ov5640_set_stream_bt656() function.
Refine comments about MIPI IO register control.
Fixes: 4039b03720
("media: i2c: ov5640: Add support for BT656 mode")
Signed-off-by: Hugues Fruchet <hugues.fruchet@st.com>
Reviewed-by: Jacopo Mondi <jacopo@jmondi.org>
Tested-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
This commit is contained in:
parent
4b6c129e87
commit
68579b32e7
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@ -1240,20 +1240,6 @@ static int ov5640_set_autogain(struct ov5640_dev *sensor, bool on)
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BIT(1), on ? 0 : BIT(1));
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BIT(1), on ? 0 : BIT(1));
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}
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}
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static int ov5640_set_stream_bt656(struct ov5640_dev *sensor, bool on)
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{
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int ret;
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ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
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on ? 0x1 : 0x00);
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if (ret)
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return ret;
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return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
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OV5640_REG_SYS_CTRL0_SW_PWUP :
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OV5640_REG_SYS_CTRL0_SW_PWDN);
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}
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static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_stream_dvp(struct ov5640_dev *sensor, bool on)
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{
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{
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return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
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return ov5640_write_reg(sensor, OV5640_REG_SYS_CTRL0, on ?
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@ -2018,13 +2004,13 @@ static int ov5640_set_power_mipi(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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{
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{
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unsigned int flags = sensor->ep.bus.parallel.flags;
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unsigned int flags = sensor->ep.bus.parallel.flags;
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u8 pclk_pol = 0;
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bool bt656 = sensor->ep.bus_type == V4L2_MBUS_BT656;
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u8 hsync_pol = 0;
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u8 polarities = 0;
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u8 vsync_pol = 0;
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int ret;
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int ret;
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if (!on) {
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if (!on) {
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/* Reset settings to their default values. */
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/* Reset settings to their default values. */
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ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00, 0x00);
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ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
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ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x58);
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ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
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ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, 0x20);
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ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
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ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01, 0x00);
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@ -2048,7 +2034,35 @@ static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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* - VSYNC: active high
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* - VSYNC: active high
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* - HREF: active low
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* - HREF: active low
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* - PCLK: active low
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* - PCLK: active low
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*
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* VSYNC & HREF are not configured if BT656 bus mode is selected
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*/
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*/
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/*
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* BT656 embedded synchronization configuration
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*
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* CCIR656 CTRL00
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* - [7]: SYNC code selection (0: auto generate sync code,
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* 1: sync code from regs 0x4732-0x4735)
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* - [6]: f value in CCIR656 SYNC code when fixed f value
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* - [5]: Fixed f value
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* - [4:3]: Blank toggle data options (00: data=1'h040/1'h200,
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* 01: data from regs 0x4736-0x4738, 10: always keep 0)
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* - [1]: Clip data disable
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* - [0]: CCIR656 mode enable
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*
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* Default CCIR656 SAV/EAV mode with default codes
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* SAV=0xff000080 & EAV=0xff00009d is enabled here with settings:
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* - CCIR656 mode enable
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* - auto generation of sync codes
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* - blank toggle data 1'h040/1'h200
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* - clip reserved data (0x00 & 0xff changed to 0x01 & 0xfe)
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*/
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ret = ov5640_write_reg(sensor, OV5640_REG_CCIR656_CTRL00,
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bt656 ? 0x01 : 0x00);
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if (ret)
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return ret;
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/*
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/*
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* configure parallel port control lines polarity
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* configure parallel port control lines polarity
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*
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*
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@ -2059,29 +2073,26 @@ static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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* datasheet and hardware, 0 is active high
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* datasheet and hardware, 0 is active high
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* and 1 is active low...)
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* and 1 is active low...)
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*/
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*/
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if (sensor->ep.bus_type == V4L2_MBUS_PARALLEL) {
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if (!bt656) {
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if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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pclk_pol = 1;
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if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
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if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
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hsync_pol = 1;
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polarities |= BIT(1);
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if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
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if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
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vsync_pol = 1;
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polarities |= BIT(0);
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ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00,
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(pclk_pol << 5) | (hsync_pol << 1) |
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vsync_pol);
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if (ret)
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return ret;
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}
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}
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if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
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polarities |= BIT(5);
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ret = ov5640_write_reg(sensor, OV5640_REG_POLARITY_CTRL00, polarities);
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if (ret)
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return ret;
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/*
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/*
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* powerdown MIPI TX/RX PHY & disable MIPI
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* powerdown MIPI TX/RX PHY & enable DVP
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*
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*
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* MIPI CONTROL 00
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* MIPI CONTROL 00
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* 4: PWDN PHY TX
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* [4] = 1 : Power down MIPI HS Tx
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* 3: PWDN PHY RX
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* [3] = 1 : Power down MIPI LS Rx
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* 2: MIPI enable
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* [2] = 0 : DVP enable (MIPI disable)
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*/
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*/
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ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
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ret = ov5640_write_reg(sensor, OV5640_REG_IO_MIPI_CTRL00, 0x18);
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if (ret)
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if (ret)
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@ -2098,8 +2109,7 @@ static int ov5640_set_power_dvp(struct ov5640_dev *sensor, bool on)
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* - [3:0]: D[9:6] output enable
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* - [3:0]: D[9:6] output enable
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*/
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*/
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ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
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ret = ov5640_write_reg(sensor, OV5640_REG_PAD_OUTPUT_ENABLE01,
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sensor->ep.bus_type == V4L2_MBUS_PARALLEL ?
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bt656 ? 0x1f : 0x7f);
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0x7f : 0x1f);
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if (ret)
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if (ret)
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return ret;
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return ret;
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@ -2949,8 +2959,6 @@ static int ov5640_s_stream(struct v4l2_subdev *sd, int enable)
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if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
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if (sensor->ep.bus_type == V4L2_MBUS_CSI2_DPHY)
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ret = ov5640_set_stream_mipi(sensor, enable);
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ret = ov5640_set_stream_mipi(sensor, enable);
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else if (sensor->ep.bus_type == V4L2_MBUS_BT656)
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ret = ov5640_set_stream_bt656(sensor, enable);
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else
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else
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ret = ov5640_set_stream_dvp(sensor, enable);
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ret = ov5640_set_stream_dvp(sensor, enable);
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