drm/amd/display: dc/core: add SI/DCE6 support (v2)
[Why]
resource_parse_asic_id() and dc_create_resource_pool() are missing SI/DCE6 cases
[How]
SI/DCE6 cases support added using existing DCE8 implementation as a reference
(v2) updated due to following kernel 5.2 commit:
d9673c9
("drm/amd/display: Pass init_data into DCN resource creation")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
parent
7c15fd86aa
commit
683b59504d
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@ -42,6 +42,9 @@
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#include "virtual/virtual_stream_encoder.h"
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#include "dpcd_defs.h"
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#if defined(CONFIG_DRM_AMD_DC_SI)
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#include "dce60/dce60_resource.h"
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#endif
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#include "dce80/dce80_resource.h"
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#include "dce100/dce100_resource.h"
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#include "dce110/dce110_resource.h"
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@ -63,6 +66,18 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
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enum dce_version dc_version = DCE_VERSION_UNKNOWN;
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switch (asic_id.chip_family) {
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#if defined(CONFIG_DRM_AMD_DC_SI)
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case FAMILY_SI:
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if (ASIC_REV_IS_TAHITI_P(asic_id.hw_internal_rev) ||
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ASIC_REV_IS_PITCAIRN_PM(asic_id.hw_internal_rev) ||
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ASIC_REV_IS_CAPEVERDE_M(asic_id.hw_internal_rev))
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dc_version = DCE_VERSION_6_0;
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else if (ASIC_REV_IS_OLAND_M(asic_id.hw_internal_rev))
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dc_version = DCE_VERSION_6_4;
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else
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dc_version = DCE_VERSION_6_1;
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break;
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#endif
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case FAMILY_CI:
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dc_version = DCE_VERSION_8_0;
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break;
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@ -129,6 +144,20 @@ struct resource_pool *dc_create_resource_pool(struct dc *dc,
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struct resource_pool *res_pool = NULL;
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switch (dc_version) {
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#if defined(CONFIG_DRM_AMD_DC_SI)
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case DCE_VERSION_6_0:
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res_pool = dce60_create_resource_pool(
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init_data->num_virtual_links, dc);
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break;
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case DCE_VERSION_6_1:
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res_pool = dce61_create_resource_pool(
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init_data->num_virtual_links, dc);
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break;
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case DCE_VERSION_6_4:
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res_pool = dce64_create_resource_pool(
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init_data->num_virtual_links, dc);
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break;
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#endif
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case DCE_VERSION_8_0:
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res_pool = dce80_create_resource_pool(
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init_data->num_virtual_links, dc);
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