ASoC: mediatek: mt6359: add the calibration functions
Add the calibraion functions for initializing the codec when registering the machine driver. Signed-off-by: Jiaxin Yu <jiaxin.yu@mediatek.com> Link: https://lore.kernel.org/r/1604390378-23993-2-git-send-email-jiaxin.yu@mediatek.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -68,6 +68,38 @@ static void mt6359_reset_capture_gpio(struct mt6359_priv *priv)
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0x3 << 0, 0x0);
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}
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/* use only when doing mtkaif calibraiton at the boot time */
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static void mt6359_set_dcxo(struct mt6359_priv *priv, bool enable)
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{
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regmap_update_bits(priv->regmap, MT6359_DCXO_CW12,
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0x1 << RG_XO_AUDIO_EN_M_SFT,
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(enable ? 1 : 0) << RG_XO_AUDIO_EN_M_SFT);
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}
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/* use only when doing mtkaif calibraiton at the boot time */
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static void mt6359_set_clksq(struct mt6359_priv *priv, bool enable)
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{
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/* Enable/disable CLKSQ 26MHz */
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regmap_update_bits(priv->regmap, MT6359_AUDENC_ANA_CON23,
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RG_CLKSQ_EN_MASK_SFT,
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(enable ? 1 : 0) << RG_CLKSQ_EN_SFT);
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}
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/* use only when doing mtkaif calibraiton at the boot time */
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static void mt6359_set_aud_global_bias(struct mt6359_priv *priv, bool enable)
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{
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regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON13,
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RG_AUDGLB_PWRDN_VA32_MASK_SFT,
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(enable ? 0 : 1) << RG_AUDGLB_PWRDN_VA32_SFT);
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}
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/* use only when doing mtkaif calibraiton at the boot time */
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static void mt6359_set_topck(struct mt6359_priv *priv, bool enable)
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{
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regmap_update_bits(priv->regmap, MT6359_AUD_TOP_CKPDN_CON0,
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0x0066, enable ? 0x0 : 0x66);
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}
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static void mt6359_set_decoder_clk(struct mt6359_priv *priv, bool enable)
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{
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regmap_update_bits(priv->regmap, MT6359_AUDDEC_ANA_CON13,
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@ -122,6 +154,84 @@ static void mt6359_mtkaif_tx_disable(struct mt6359_priv *priv)
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0xff00, 0x3000);
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}
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void mt6359_set_mtkaif_protocol(struct snd_soc_component *cmpnt,
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int mtkaif_protocol)
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{
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struct mt6359_priv *priv = snd_soc_component_get_drvdata(cmpnt);
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priv->mtkaif_protocol = mtkaif_protocol;
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}
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EXPORT_SYMBOL_GPL(mt6359_set_mtkaif_protocol);
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void mt6359_mtkaif_calibration_enable(struct snd_soc_component *cmpnt)
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{
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struct mt6359_priv *priv = snd_soc_component_get_drvdata(cmpnt);
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mt6359_set_playback_gpio(priv);
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mt6359_set_capture_gpio(priv);
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mt6359_mtkaif_tx_enable(priv);
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mt6359_set_dcxo(priv, true);
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mt6359_set_aud_global_bias(priv, true);
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mt6359_set_clksq(priv, true);
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mt6359_set_topck(priv, true);
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/* set dat_miso_loopback on */
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG,
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RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_MASK_SFT,
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1 << RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_SFT);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG,
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RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_MASK_SFT,
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1 << RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG1,
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RG_AUD_PAD_TOP_DAT_MISO3_LOOPBACK_MASK_SFT,
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1 << RG_AUD_PAD_TOP_DAT_MISO3_LOOPBACK_SFT);
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}
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EXPORT_SYMBOL_GPL(mt6359_mtkaif_calibration_enable);
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void mt6359_mtkaif_calibration_disable(struct snd_soc_component *cmpnt)
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{
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struct mt6359_priv *priv = snd_soc_component_get_drvdata(cmpnt);
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/* set dat_miso_loopback off */
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG,
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RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_MASK_SFT,
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0 << RG_AUD_PAD_TOP_DAT_MISO2_LOOPBACK_SFT);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG,
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RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_MASK_SFT,
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0 << RG_AUD_PAD_TOP_DAT_MISO_LOOPBACK_SFT);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG1,
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RG_AUD_PAD_TOP_DAT_MISO3_LOOPBACK_MASK_SFT,
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0 << RG_AUD_PAD_TOP_DAT_MISO3_LOOPBACK_SFT);
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mt6359_set_topck(priv, false);
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mt6359_set_clksq(priv, false);
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mt6359_set_aud_global_bias(priv, false);
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mt6359_set_dcxo(priv, false);
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mt6359_mtkaif_tx_disable(priv);
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mt6359_reset_playback_gpio(priv);
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mt6359_reset_capture_gpio(priv);
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}
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EXPORT_SYMBOL_GPL(mt6359_mtkaif_calibration_disable);
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void mt6359_set_mtkaif_calibration_phase(struct snd_soc_component *cmpnt,
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int phase_1, int phase_2, int phase_3)
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{
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struct mt6359_priv *priv = snd_soc_component_get_drvdata(cmpnt);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG,
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RG_AUD_PAD_TOP_PHASE_MODE_MASK_SFT,
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phase_1 << RG_AUD_PAD_TOP_PHASE_MODE_SFT);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG,
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RG_AUD_PAD_TOP_PHASE_MODE2_MASK_SFT,
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phase_2 << RG_AUD_PAD_TOP_PHASE_MODE2_SFT);
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regmap_update_bits(priv->regmap, MT6359_AUDIO_DIG_CFG1,
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RG_AUD_PAD_TOP_PHASE_MODE3_MASK_SFT,
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phase_3 << RG_AUD_PAD_TOP_PHASE_MODE3_SFT);
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}
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EXPORT_SYMBOL_GPL(mt6359_set_mtkaif_calibration_phase);
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static void zcd_disable(struct mt6359_priv *priv)
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{
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regmap_write(priv->regmap, MT6359_ZCD_CON0, 0x0000);
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@ -2637,4 +2637,11 @@ struct mt6359_priv {
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(type) == MIC_TYPE_MUX_DCC_ECM_DIFF || \
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(type) == MIC_TYPE_MUX_DCC_ECM_SINGLE)
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void mt6359_set_mtkaif_protocol(struct snd_soc_component *cmpnt,
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int mtkaif_protocol);
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void mt6359_mtkaif_calibration_enable(struct snd_soc_component *cmpnt);
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void mt6359_mtkaif_calibration_disable(struct snd_soc_component *cmpnt);
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void mt6359_set_mtkaif_calibration_phase(struct snd_soc_component *cmpnt,
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int phase_1, int phase_2, int phase_3);
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#endif/* end _MT6359_H_ */
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