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drm/amdgpu/dce11: fix audio offset for asics with >7 audio pins 

Missing offset in the audio offset array.

Reported-by: Dan Carpenter <dan.carpenter@oracle.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2016-05-10 09:29:56 -04:00
parent 758ac17f96
commit 67b1fcc9ac
2 changed files with 3 additions and 1 deletions
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1
drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
View File

@ -1602,6 +1602,7 @@ static const u32 pin_offsets[] =
AUD4_REGISTER_OFFSET, AUD4_REGISTER_OFFSET,
AUD5_REGISTER_OFFSET, AUD5_REGISTER_OFFSET,
AUD6_REGISTER_OFFSET, AUD6_REGISTER_OFFSET,
AUD7_REGISTER_OFFSET,
}; };
static int dce_v11_0_audio_init(struct amdgpu_device *adev) static int dce_v11_0_audio_init(struct amdgpu_device *adev)

3
drivers/gpu/drm/amd/amdgpu/vid.h
View File

@ -54,7 +54,8 @@
#define AUD3_REGISTER_OFFSET (0x17b4 - 0x17a8) #define AUD3_REGISTER_OFFSET (0x17b4 - 0x17a8)
#define AUD4_REGISTER_OFFSET (0x17b8 - 0x17a8) #define AUD4_REGISTER_OFFSET (0x17b8 - 0x17a8)
#define AUD5_REGISTER_OFFSET (0x17bc - 0x17a8) #define AUD5_REGISTER_OFFSET (0x17bc - 0x17a8)
#define AUD6_REGISTER_OFFSET (0x17c4 - 0x17a8) #define AUD6_REGISTER_OFFSET (0x17c0 - 0x17a8)
#define AUD7_REGISTER_OFFSET (0x17c4 - 0x17a8)
/* hpd instance offsets */ /* hpd instance offsets */
#define HPD0_REGISTER_OFFSET (0x1898 - 0x1898) #define HPD0_REGISTER_OFFSET (0x1898 - 0x1898)