ARM: at91/dt: at91sam9n12: use slow clock where necessary
The watchdog, the reset controller, the RTC, the shutdown controller, the timer counters and the LCD PWM need the slow clock, add it where necessary. The LCD PWM will be handled later. Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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@ -376,6 +376,7 @@
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rstc@fffffe00 {
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compatible = "atmel,at91sam9g45-rstc";
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reg = <0xfffffe00 0x10>;
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clocks = <&clk32k>;
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};
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pit: timer@fffffe30 {
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@ -388,6 +389,7 @@
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shdwc@fffffe10 {
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compatible = "atmel,at91sam9x5-shdwc";
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reg = <0xfffffe10 0x10>;
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clocks = <&clk32k>;
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};
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sckc@fffffe50 {
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@ -431,16 +433,16 @@
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf8008000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tcb_clk>;
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clock-names = "t0_clk";
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clocks = <&tcb_clk>, <&clk32k>;
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clock-names = "t0_clk", "slow_clk";
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};
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tcb1: timer@f800c000 {
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compatible = "atmel,at91sam9x5-tcb";
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reg = <0xf800c000 0x100>;
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interrupts = <17 IRQ_TYPE_LEVEL_HIGH 0>;
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clocks = <&tcb_clk>;
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clock-names = "t0_clk";
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clocks = <&tcb_clk>, <&clk32k>;
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clock-names = "t0_clk", "slow_clk";
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};
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dma: dma-controller@ffffec00 {
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@ -891,6 +893,7 @@
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compatible = "atmel,at91sam9260-wdt";
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reg = <0xfffffe40 0x10>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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atmel,watchdog-type = "hardware";
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atmel,reset-type = "all";
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atmel,dbg-halt;
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@ -901,6 +904,7 @@
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compatible = "atmel,at91rm9200-rtc";
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reg = <0xfffffeb0 0x40>;
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interrupts = <1 IRQ_TYPE_LEVEL_HIGH 7>;
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clocks = <&clk32k>;
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status = "disabled";
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};
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