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drm/amdgpu: drop the bios scratch reg callbacks from nbio 

They are not used any longer.  We get the scratch register
locations from the vbios directly now.

Acked-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2017-12-08 13:11:33 -05:00
parent bf383fb64e
commit 670b603c11
3 changed files with 0 additions and 31 deletions
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3
drivers/gpu/drm/amd/amdgpu/amdgpu.h
View File

@ -1451,9 +1451,6 @@ struct amdgpu_nbio_funcs {
u32 (*get_pcie_index_offset)(struct amdgpu_device *adev);
u32 (*get_pcie_data_offset)(struct amdgpu_device *adev);
u32 (*get_rev_id)(struct amdgpu_device *adev);
u32 (*get_atombios_scratch_regs)(struct amdgpu_device *adev, uint32_t idx);
void (*set_atombios_scratch_regs)(struct amdgpu_device *adev,
uint32_t idx, uint32_t val);
void (*mc_access_enable)(struct amdgpu_device *adev, bool enable);
void (*hdp_flush)(struct amdgpu_device *adev);
u32 (*get_memsize)(struct amdgpu_device *adev);

14
drivers/gpu/drm/amd/amdgpu/nbio_v6_1.c
View File

@ -43,18 +43,6 @@ static u32 nbio_v6_1_get_rev_id(struct amdgpu_device *adev)
return tmp;
}
static u32 nbio_v6_1_get_atombios_scratch_regs(struct amdgpu_device *adev,
uint32_t idx)
{
return RREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx);
}
static void nbio_v6_1_set_atombios_scratch_regs(struct amdgpu_device *adev,
uint32_t idx, uint32_t val)
{
WREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx, val);
}
static void nbio_v6_1_mc_access_enable(struct amdgpu_device *adev, bool enable)
{
if (enable)
@ -284,8 +272,6 @@ const struct amdgpu_nbio_funcs nbio_v6_1_funcs = {
.get_pcie_index_offset = nbio_v6_1_get_pcie_index_offset,
.get_pcie_data_offset = nbio_v6_1_get_pcie_data_offset,
.get_rev_id = nbio_v6_1_get_rev_id,
.get_atombios_scratch_regs = nbio_v6_1_get_atombios_scratch_regs,
.set_atombios_scratch_regs = nbio_v6_1_set_atombios_scratch_regs,
.mc_access_enable = nbio_v6_1_mc_access_enable,
.hdp_flush = nbio_v6_1_hdp_flush,
.get_memsize = nbio_v6_1_get_memsize,

14
drivers/gpu/drm/amd/amdgpu/nbio_v7_0.c
View File

@ -44,18 +44,6 @@ static u32 nbio_v7_0_get_rev_id(struct amdgpu_device *adev)
return tmp;
}
static u32 nbio_v7_0_get_atombios_scratch_regs(struct amdgpu_device *adev,
uint32_t idx)
{
return RREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx);
}
static void nbio_v7_0_set_atombios_scratch_regs(struct amdgpu_device *adev,
uint32_t idx, uint32_t val)
{
WREG32_SOC15_OFFSET(NBIO, 0, mmBIOS_SCRATCH_0, idx, val);
}
static void nbio_v7_0_mc_access_enable(struct amdgpu_device *adev, bool enable)
{
if (enable)
@ -279,8 +267,6 @@ const struct amdgpu_nbio_funcs nbio_v7_0_funcs = {
.get_pcie_index_offset = nbio_v7_0_get_pcie_index_offset,
.get_pcie_data_offset = nbio_v7_0_get_pcie_data_offset,
.get_rev_id = nbio_v7_0_get_rev_id,
.get_atombios_scratch_regs = nbio_v7_0_get_atombios_scratch_regs,
.set_atombios_scratch_regs = nbio_v7_0_set_atombios_scratch_regs,
.mc_access_enable = nbio_v7_0_mc_access_enable,
.hdp_flush = nbio_v7_0_hdp_flush,
.get_memsize = nbio_v7_0_get_memsize,