usb: chipidea: Add support for VBUS control with PHY

Some platforms make use of VBUS control over PHY which means controller
driver has to access PHY registers to turn on/off VBUS line.This patch
adds support for such platforms in chipidea.

Flag 'CI_HDRC_PHY_VBUS_CONTROL' added to support VBus control feature.

Acked-by: Peter Chen <peter.chen@kernel.org>
Signed-off-by: Piyush Mehta <piyush.mehta@xilinx.com>
Signed-off-by: Piyush Mehta <piyush.mehta@amd.com>
Link: https://lore.kernel.org/r/20220822054051.2941282-1-piyush.mehta@amd.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Piyush Mehta 2022-08-22 11:10:51 +05:30 committed by Greg Kroah-Hartman
parent 6b91a8e341
commit 66d1c8021e
4 changed files with 16 additions and 0 deletions

View File

@ -30,6 +30,7 @@ static const struct ci_hdrc_platform_data ci_default_pdata = {
static const struct ci_hdrc_platform_data ci_zynq_pdata = {
.capoffset = DEF_CAPOFFSET,
.flags = CI_HDRC_PHY_VBUS_CONTROL,
};
static const struct ci_hdrc_platform_data ci_zevio_pdata = {

View File

@ -63,6 +63,13 @@ static int ehci_ci_portpower(struct usb_hcd *hcd, int portnum, bool enable)
priv->enabled = enable;
}
if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL) {
if (enable)
usb_phy_vbus_on(ci->usb_phy);
else
usb_phy_vbus_off(ci->usb_phy);
}
if (enable && (ci->platdata->phy_mode == USBPHY_INTERFACE_MODE_HSIC)) {
/*
* Marvell 28nm HSIC PHY requires forcing the port to HS mode.

View File

@ -471,6 +471,10 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
return;
}
}
if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL)
usb_phy_vbus_on(ci->usb_phy);
/* Disable data pulse irq */
hw_write_otgsc(ci, OTGSC_DPIE, 0);
@ -480,6 +484,9 @@ static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
if (ci->platdata->reg_vbus)
regulator_disable(ci->platdata->reg_vbus);
if (ci->platdata->flags & CI_HDRC_PHY_VBUS_CONTROL)
usb_phy_vbus_off(ci->usb_phy);
fsm->a_bus_drop = 1;
fsm->a_bus_req = 0;
}

View File

@ -62,6 +62,7 @@ struct ci_hdrc_platform_data {
#define CI_HDRC_REQUIRES_ALIGNED_DMA BIT(13)
#define CI_HDRC_IMX_IS_HSIC BIT(14)
#define CI_HDRC_PMQOS BIT(15)
#define CI_HDRC_PHY_VBUS_CONTROL BIT(16)
enum usb_dr_mode dr_mode;
#define CI_HDRC_CONTROLLER_RESET_EVENT 0
#define CI_HDRC_CONTROLLER_STOPPED_EVENT 1