UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

gpu: Bulk conversion to generic_handle_domain_irq() 

Wherever possible, replace constructs that match either
generic_handle_irq(irq_find_mapping()) or
generic_handle_irq(irq_linear_revmap()) to a single call to
generic_handle_domain_irq().

Signed-off-by: Marc Zyngier <maz@kernel.org>
This commit is contained in:
Marc Zyngier 2021-05-04 17:42:18 +01:00
parent 0661cb2af0
commit 66c6594b6d
4 changed files with 10 additions and 21 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c
View File

@ -502,7 +502,7 @@ void amdgpu_irq_dispatch(struct amdgpu_device *adev,
} else if ((client_id == AMDGPU_IRQ_CLIENTID_LEGACY) &&
adev->irq.virq[src_id]) {
generic_handle_irq(irq_find_mapping(adev->irq.domain, src_id));
generic_handle_domain_irq(adev->irq.domain, src_id);
} else if (!adev->irq.client[client_id].sources) {
DRM_DEBUG("Unregistered interrupt client_id: %d src_id: %d\n",

15
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c
View File

@ -45,20 +45,13 @@ static void dpu_mdss_irq(struct irq_desc *desc)
while (interrupts) {
irq_hw_number_t hwirq = fls(interrupts) - 1;
unsigned int mapping;
int rc;
mapping = irq_find_mapping(dpu_mdss->irq_controller.domain,
hwirq);
if (mapping == 0) {
DRM_ERROR("couldn't find irq mapping for %lu\n", hwirq);
break;
}
rc = generic_handle_irq(mapping);
rc = generic_handle_domain_irq(dpu_mdss->irq_controller.domain,
hwirq);
if (rc < 0) {
DRM_ERROR("handle irq fail: irq=%lu mapping=%u rc=%d\n",
hwirq, mapping, rc);
DRM_ERROR("handle irq fail: irq=%lu rc=%d\n",
hwirq, rc);
break;
}

3
drivers/gpu/drm/msm/disp/mdp5/mdp5_mdss.c
View File

@ -50,8 +50,7 @@ static irqreturn_t mdss_irq(int irq, void *arg)
while (intr) {
irq_hw_number_t hwirq = fls(intr) - 1;
generic_handle_irq(irq_find_mapping(
mdp5_mdss->irqcontroller.domain, hwirq));
generic_handle_domain_irq(mdp5_mdss->irqcontroller.domain, hwirq);
intr &= ~(1 << hwirq);
}

11
drivers/gpu/ipu-v3/ipu-common.c
View File

@ -1003,19 +1003,16 @@ err_cpmem:
static void ipu_irq_handle(struct ipu_soc *ipu, const int *regs, int num_regs)
{
unsigned long status;
int i, bit, irq;
int i, bit;
for (i = 0; i < num_regs; i++) {
status = ipu_cm_read(ipu, IPU_INT_STAT(regs[i]));
status &= ipu_cm_read(ipu, IPU_INT_CTRL(regs[i]));
for_each_set_bit(bit, &status, 32) {
irq = irq_linear_revmap(ipu->domain,
regs[i] * 32 + bit);
if (irq)
generic_handle_irq(irq);
}
for_each_set_bit(bit, &status, 32)
generic_handle_domain_irq(ipu->domain,
regs[i] * 32 + bit);
}
}