mlx4: Put physical GID and P_Key table sizes in mlx4_phys_caps struct and paravirtualize them
To allow easy paravirtualization of P_Key and GID table sizes, keep paravirtualized sizes in mlx4_dev->caps, but save the actual physical sizes from FW in struct: mlx4_dev->phys_cap. In addition, in SR-IOV mode, do the following: 1. Reduce reported P_Key table size by 1. This is done to reserve the highest P_Key index for internal use, for declaring an invalid P_Key in P_Key paravirtualization. We require a P_Key index which always contain an invalid P_Key value for this purpose (i.e., one which cannot be modified by the subnet manager). The way to do this is to reduce the P_Key table size reported to the subnet manager by 1, so that it will not attempt to access the P_Key at index #127. 2. Paravirtualize the GID table size to 1. Thus, each guest sees only a single GID (at its paravirtualized index 0). In addition, since we are paravirtualizing the GID table size to 1, we add paravirtualization of the master GID event here (i.e., we do not do ib_dispatch_event() for the GUID change event on the master, since its (only) GUID never changes). Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il> Signed-off-by: Roland Dreier <roland@purestorage.com>
This commit is contained in:
parent
105c320f6a
commit
6634961c14
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@ -184,8 +184,10 @@ static void smp_snoop(struct ib_device *ibdev, u8 port_num, struct ib_mad *mad,
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break;
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case IB_SMP_ATTR_GUID_INFO:
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mlx4_ib_dispatch_event(dev, port_num,
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IB_EVENT_GID_CHANGE);
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/* paravirtualized master's guid is guid 0 -- does not change */
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if (!mlx4_is_master(dev->dev))
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mlx4_ib_dispatch_event(dev, port_num,
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IB_EVENT_GID_CHANGE);
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break;
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default:
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break;
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@ -487,7 +489,9 @@ void handle_port_mgmt_change_event(struct work_struct *work)
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mlx4_ib_dispatch_event(dev, port, IB_EVENT_PKEY_CHANGE);
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break;
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case MLX4_DEV_PMC_SUBTYPE_GUID_INFO:
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mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
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/* paravirtualized master's guid is guid 0 -- does not change */
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if (!mlx4_is_master(dev->dev))
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mlx4_ib_dispatch_event(dev, port, IB_EVENT_GID_CHANGE);
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break;
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default:
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pr_warn("Unsupported subtype 0x%x for "
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@ -730,9 +730,12 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
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{
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u64 def_mac;
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u8 port_type;
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u16 short_field;
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int err;
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#define MLX4_VF_PORT_NO_LINK_SENSE_MASK 0xE0
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#define QUERY_PORT_CUR_MAX_PKEY_OFFSET 0x0c
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#define QUERY_PORT_CUR_MAX_GID_OFFSET 0x0e
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err = mlx4_cmd_box(dev, 0, outbox->dma, vhcr->in_modifier, 0,
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MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
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@ -755,11 +758,51 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
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MLX4_PUT(outbox->buf, port_type,
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QUERY_PORT_SUPPORTED_TYPE_OFFSET);
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short_field = 1; /* slave max gids */
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MLX4_PUT(outbox->buf, short_field,
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QUERY_PORT_CUR_MAX_GID_OFFSET);
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short_field = dev->caps.pkey_table_len[vhcr->in_modifier];
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MLX4_PUT(outbox->buf, short_field,
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QUERY_PORT_CUR_MAX_PKEY_OFFSET);
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}
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return err;
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}
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int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port,
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int *gid_tbl_len, int *pkey_tbl_len)
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{
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struct mlx4_cmd_mailbox *mailbox;
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u32 *outbox;
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u16 field;
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int err;
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mailbox = mlx4_alloc_cmd_mailbox(dev);
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if (IS_ERR(mailbox))
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return PTR_ERR(mailbox);
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err = mlx4_cmd_box(dev, 0, mailbox->dma, port, 0,
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MLX4_CMD_QUERY_PORT, MLX4_CMD_TIME_CLASS_B,
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MLX4_CMD_WRAPPED);
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if (err)
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goto out;
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outbox = mailbox->buf;
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MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_GID_OFFSET);
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*gid_tbl_len = field;
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MLX4_GET(field, outbox, QUERY_PORT_CUR_MAX_PKEY_OFFSET);
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*pkey_tbl_len = field;
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out:
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mlx4_free_cmd_mailbox(dev, mailbox);
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return err;
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}
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EXPORT_SYMBOL(mlx4_get_slave_pkey_gid_tbl_len);
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int mlx4_map_cmd(struct mlx4_dev *dev, u16 op, struct mlx4_icm *icm, u64 virt)
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{
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struct mlx4_cmd_mailbox *mailbox;
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@ -215,6 +215,10 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
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for (i = 1; i <= dev->caps.num_ports; ++i) {
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dev->caps.vl_cap[i] = dev_cap->max_vl[i];
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dev->caps.ib_mtu_cap[i] = dev_cap->ib_mtu[i];
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dev->phys_caps.gid_phys_table_len[i] = dev_cap->max_gids[i];
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dev->phys_caps.pkey_phys_table_len[i] = dev_cap->max_pkeys[i];
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/* set gid and pkey table operating lengths by default
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* to non-sriov values */
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dev->caps.gid_table_len[i] = dev_cap->max_gids[i];
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dev->caps.pkey_table_len[i] = dev_cap->max_pkeys[i];
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dev->caps.port_width_cap[i] = dev_cap->max_port_width[i];
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@ -498,8 +502,13 @@ static int mlx4_slave_cap(struct mlx4_dev *dev)
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return -ENODEV;
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}
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for (i = 1; i <= dev->caps.num_ports; ++i)
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for (i = 1; i <= dev->caps.num_ports; ++i) {
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dev->caps.port_mask[i] = dev->caps.port_type[i];
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if (mlx4_get_slave_pkey_gid_tbl_len(dev, i,
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&dev->caps.gid_table_len[i],
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&dev->caps.pkey_table_len[i]))
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return -ENODEV;
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}
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if (dev->caps.uar_page_size * (dev->caps.num_uars -
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dev->caps.reserved_uars) >
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@ -536,7 +545,7 @@ int mlx4_change_port_types(struct mlx4_dev *dev,
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for (port = 1; port <= dev->caps.num_ports; port++) {
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mlx4_CLOSE_PORT(dev, port);
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dev->caps.port_type[port] = port_types[port - 1];
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err = mlx4_SET_PORT(dev, port);
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err = mlx4_SET_PORT(dev, port, -1);
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if (err) {
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mlx4_err(dev, "Failed to set port %d, "
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"aborting\n", port);
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@ -722,7 +731,7 @@ static ssize_t set_port_ib_mtu(struct device *dev,
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mlx4_unregister_device(mdev);
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for (port = 1; port <= mdev->caps.num_ports; port++) {
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mlx4_CLOSE_PORT(mdev, port);
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err = mlx4_SET_PORT(mdev, port);
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err = mlx4_SET_PORT(mdev, port, -1);
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if (err) {
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mlx4_err(mdev, "Failed to set port %d, "
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"aborting\n", port);
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@ -1173,6 +1182,17 @@ err:
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return -EIO;
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}
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static void mlx4_parav_master_pf_caps(struct mlx4_dev *dev)
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{
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int i;
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for (i = 1; i <= dev->caps.num_ports; i++) {
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dev->caps.gid_table_len[i] = 1;
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dev->caps.pkey_table_len[i] =
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dev->phys_caps.pkey_phys_table_len[i] - 1;
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}
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}
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static int mlx4_init_hca(struct mlx4_dev *dev)
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{
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struct mlx4_priv *priv = mlx4_priv(dev);
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@ -1212,6 +1232,9 @@ static int mlx4_init_hca(struct mlx4_dev *dev)
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goto err_stop_fw;
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}
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if (mlx4_is_master(dev))
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mlx4_parav_master_pf_caps(dev);
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profile = default_profile;
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icm_size = mlx4_make_profile(dev, &profile, &dev_cap,
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@ -1500,7 +1523,8 @@ static int mlx4_setup_hca(struct mlx4_dev *dev)
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else
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dev->caps.port_ib_mtu[port] = IB_MTU_4096;
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err = mlx4_SET_PORT(dev, port);
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err = mlx4_SET_PORT(dev, port, mlx4_is_master(dev) ?
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dev->caps.pkey_table_len[port] : -1);
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if (err) {
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mlx4_err(dev, "Failed to set port %d, aborting\n",
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port);
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@ -969,7 +969,7 @@ int mlx4_change_port_types(struct mlx4_dev *dev,
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void mlx4_init_mac_table(struct mlx4_dev *dev, struct mlx4_mac_table *table);
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void mlx4_init_vlan_table(struct mlx4_dev *dev, struct mlx4_vlan_table *table);
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int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port);
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int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz);
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/* resource tracker functions*/
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int mlx4_get_slave_from_resource_id(struct mlx4_dev *dev,
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enum mlx4_resource resource_type,
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@ -1012,6 +1012,8 @@ int mlx4_QUERY_PORT_wrapper(struct mlx4_dev *dev, int slave,
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struct mlx4_cmd_info *cmd);
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int mlx4_get_port_ib_caps(struct mlx4_dev *dev, u8 port, __be32 *caps);
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int mlx4_get_slave_pkey_gid_tbl_len(struct mlx4_dev *dev, u8 port,
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int *gid_tbl_len, int *pkey_tbl_len);
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int mlx4_QP_ATTACH_wrapper(struct mlx4_dev *dev, int slave,
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struct mlx4_vhcr *vhcr,
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@ -726,14 +726,15 @@ int mlx4_SET_PORT_wrapper(struct mlx4_dev *dev, int slave,
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enum {
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MLX4_SET_PORT_VL_CAP = 4, /* bits 7:4 */
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MLX4_SET_PORT_MTU_CAP = 12, /* bits 15:12 */
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MLX4_CHANGE_PORT_PKEY_TBL_SZ = 20,
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MLX4_CHANGE_PORT_VL_CAP = 21,
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MLX4_CHANGE_PORT_MTU_CAP = 22,
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};
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int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port)
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int mlx4_SET_PORT(struct mlx4_dev *dev, u8 port, int pkey_tbl_sz)
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{
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struct mlx4_cmd_mailbox *mailbox;
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int err, vl_cap;
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int err, vl_cap, pkey_tbl_flag = 0;
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if (dev->caps.port_type[port] == MLX4_PORT_TYPE_ETH)
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return 0;
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((__be32 *) mailbox->buf)[1] = dev->caps.ib_port_def_cap[port];
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if (pkey_tbl_sz >= 0 && mlx4_is_master(dev)) {
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pkey_tbl_flag = 1;
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((__be16 *) mailbox->buf)[20] = cpu_to_be16(pkey_tbl_sz);
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}
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/* IB VL CAP enum isn't used by the firmware, just numerical values */
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for (vl_cap = 8; vl_cap >= 1; vl_cap >>= 1) {
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((__be32 *) mailbox->buf)[0] = cpu_to_be32(
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(1 << MLX4_CHANGE_PORT_MTU_CAP) |
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(1 << MLX4_CHANGE_PORT_VL_CAP) |
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(pkey_tbl_flag << MLX4_CHANGE_PORT_PKEY_TBL_SZ) |
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(dev->caps.port_ib_mtu[port] << MLX4_SET_PORT_MTU_CAP) |
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(vl_cap << MLX4_SET_PORT_VL_CAP));
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err = mlx4_cmd(dev, mailbox->dma, port, 0, MLX4_CMD_SET_PORT,
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@ -268,6 +268,8 @@ static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor)
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}
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struct mlx4_phys_caps {
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u32 gid_phys_table_len[MLX4_MAX_PORTS + 1];
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u32 pkey_phys_table_len[MLX4_MAX_PORTS + 1];
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u32 num_phys_eqs;
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};
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