[MIPS] vr41xx: Move IRQ numbers to asm-mips/vr41xx/irq.h
Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
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5fd3265738
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66151bbd20
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@ -21,7 +21,6 @@
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#include <linux/pci.h>
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#include <asm/vr41xx/mpc30x.h>
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#include <asm/vr41xx/vrc4173.h>
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static const int internal_func_irqs[] __initdata = {
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VRC4173_CASCADE_IRQ,
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@ -38,6 +38,7 @@
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#include <asm/cpu.h>
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#include <asm/io.h>
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#include <asm/vr41xx/irq.h>
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#include <asm/vr41xx/vr41xx.h>
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static void __iomem *icu1_base;
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@ -24,6 +24,7 @@
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#include <asm/bootinfo.h>
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#include <asm/time.h>
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#include <asm/vr41xx/irq.h>
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#include <asm/vr41xx/vr41xx.h>
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#define IO_MEM_RESOURCE_START 0UL
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@ -22,7 +22,7 @@
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#include <asm/irq_cpu.h>
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#include <asm/system.h>
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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typedef struct irq_cascade {
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int (*get_irq)(unsigned int, struct pt_regs *);
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@ -28,6 +28,7 @@
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <asm/vr41xx/irq.h>
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/vrc4173.h>
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@ -33,6 +33,7 @@
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#include <asm/cpu.h>
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#include <asm/io.h>
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#include <asm/vr41xx/giu.h>
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#include <asm/vr41xx/irq.h>
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#include <asm/vr41xx/vr41xx.h>
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MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
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@ -30,7 +30,7 @@
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#include <asm/div64.h>
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#include <asm/io.h>
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#include <asm/uaccess.h>
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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MODULE_AUTHOR("Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>");
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MODULE_DESCRIPTION("NEC VR4100 series RTC driver");
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@ -38,6 +38,7 @@
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#include <linux/tty_flip.h>
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#include <asm/io.h>
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#include <asm/vr41xx/irq.h>
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#include <asm/vr41xx/siu.h>
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#include <asm/vr41xx/vr41xx.h>
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@ -20,7 +20,7 @@
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#ifndef __ZAO_CAPCELLA_H
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#define __ZAO_CAPCELLA_H
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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/*
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* General-Purpose I/O Pin Number
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@ -15,8 +15,7 @@
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#ifndef __NEC_CMBVR4133_H
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#define __NEC_CMBVR4133_H
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#include <asm/addrspace.h>
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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/*
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* General-Purpose I/O Pin Number
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@ -0,0 +1,101 @@
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/*
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* include/asm-mips/vr41xx/irq.h
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*
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* Interrupt numbers for NEC VR4100 series.
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*
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* Copyright (C) 1999 Michael Klar
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* Copyright (C) 2001, 2002 Paul Mundt
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* Copyright (C) 2002 MontaVista Software, Inc.
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* Copyright (C) 2002 TimeSys Corp.
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* Copyright (C) 2003-2006 Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef __NEC_VR41XX_IRQ_H
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#define __NEC_VR41XX_IRQ_H
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/*
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* CPU core Interrupt Numbers
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*/
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#define MIPS_CPU_IRQ_BASE 0
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#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
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#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
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#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
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#define INT0_IRQ MIPS_CPU_IRQ(2)
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#define INT1_IRQ MIPS_CPU_IRQ(3)
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#define INT2_IRQ MIPS_CPU_IRQ(4)
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#define INT3_IRQ MIPS_CPU_IRQ(5)
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#define INT4_IRQ MIPS_CPU_IRQ(6)
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#define TIMER_IRQ MIPS_CPU_IRQ(7)
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/*
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* SYINT1 Interrupt Numbers
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*/
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#define SYSINT1_IRQ_BASE 8
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#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
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#define BATTRY_IRQ SYSINT1_IRQ(0)
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#define POWER_IRQ SYSINT1_IRQ(1)
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#define RTCLONG1_IRQ SYSINT1_IRQ(2)
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#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
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/* RFU */
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#define PIU_IRQ SYSINT1_IRQ(5)
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#define AIU_IRQ SYSINT1_IRQ(6)
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#define KIU_IRQ SYSINT1_IRQ(7)
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#define GIUINT_IRQ SYSINT1_IRQ(8)
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#define SIU_IRQ SYSINT1_IRQ(9)
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#define BUSERR_IRQ SYSINT1_IRQ(10)
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#define SOFTINT_IRQ SYSINT1_IRQ(11)
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#define CLKRUN_IRQ SYSINT1_IRQ(12)
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#define DOZEPIU_IRQ SYSINT1_IRQ(13)
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#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
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/*
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* SYSINT2 Interrupt Numbers
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*/
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#define SYSINT2_IRQ_BASE 24
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#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
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#define RTCLONG2_IRQ SYSINT2_IRQ(0)
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#define LED_IRQ SYSINT2_IRQ(1)
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#define HSP_IRQ SYSINT2_IRQ(2)
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#define TCLOCK_IRQ SYSINT2_IRQ(3)
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#define FIR_IRQ SYSINT2_IRQ(4)
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#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
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#define DSIU_IRQ SYSINT2_IRQ(5)
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#define PCI_IRQ SYSINT2_IRQ(6)
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#define SCU_IRQ SYSINT2_IRQ(7)
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#define CSI_IRQ SYSINT2_IRQ(8)
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#define BCU_IRQ SYSINT2_IRQ(9)
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#define ETHERNET_IRQ SYSINT2_IRQ(10)
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#define SYSINT2_IRQ_LAST ETHERNET_IRQ
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/*
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* GIU Interrupt Numbers
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*/
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#define GIU_IRQ_BASE 40
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#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
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#define GIU_IRQ_LAST GIU_IRQ(31)
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/*
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* VRC4173 Interrupt Numbers
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*/
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#define VRC4173_IRQ_BASE 72
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#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
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#define VRC4173_USB_IRQ VRC4173_IRQ(0)
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#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
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#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
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#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
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#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
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#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
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#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
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#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
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#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
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#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
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#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
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/* RFU */
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#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
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#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
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#endif /* __NEC_VR41XX_IRQ_H */
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@ -20,7 +20,7 @@
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#ifndef __VICTOR_MPC30X_H
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#define __VICTOR_MPC30X_H
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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/*
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* General-Purpose I/O Pin Number
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#ifndef __TANBAC_TB0219_H
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#define __TANBAC_TB0219_H
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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/*
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* General-Purpose I/O Pin Number
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#ifndef __TANBAC_TB0226_H
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#define __TANBAC_TB0226_H
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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/*
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* General-Purpose I/O Pin Number
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#ifndef __TANBAC_TB0287_H
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#define __TANBAC_TB0287_H
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#include <asm/vr41xx/vr41xx.h>
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#include <asm/vr41xx/irq.h>
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/*
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* General-Purpose I/O Pin Number
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@ -74,59 +74,6 @@ extern void vr41xx_mask_clock(vr41xx_clock_t clock);
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/*
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* Interrupt Control Unit
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*/
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/* CPU core Interrupt Numbers */
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#define MIPS_CPU_IRQ_BASE 0
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#define MIPS_CPU_IRQ(x) (MIPS_CPU_IRQ_BASE + (x))
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#define MIPS_SOFTINT0_IRQ MIPS_CPU_IRQ(0)
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#define MIPS_SOFTINT1_IRQ MIPS_CPU_IRQ(1)
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#define INT0_IRQ MIPS_CPU_IRQ(2)
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#define INT1_IRQ MIPS_CPU_IRQ(3)
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#define INT2_IRQ MIPS_CPU_IRQ(4)
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#define INT3_IRQ MIPS_CPU_IRQ(5)
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#define INT4_IRQ MIPS_CPU_IRQ(6)
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#define TIMER_IRQ MIPS_CPU_IRQ(7)
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/* SYINT1 Interrupt Numbers */
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#define SYSINT1_IRQ_BASE 8
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#define SYSINT1_IRQ(x) (SYSINT1_IRQ_BASE + (x))
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#define BATTRY_IRQ SYSINT1_IRQ(0)
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#define POWER_IRQ SYSINT1_IRQ(1)
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#define RTCLONG1_IRQ SYSINT1_IRQ(2)
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#define ELAPSEDTIME_IRQ SYSINT1_IRQ(3)
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/* RFU */
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#define PIU_IRQ SYSINT1_IRQ(5)
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#define AIU_IRQ SYSINT1_IRQ(6)
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#define KIU_IRQ SYSINT1_IRQ(7)
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#define GIUINT_IRQ SYSINT1_IRQ(8)
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#define SIU_IRQ SYSINT1_IRQ(9)
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#define BUSERR_IRQ SYSINT1_IRQ(10)
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#define SOFTINT_IRQ SYSINT1_IRQ(11)
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#define CLKRUN_IRQ SYSINT1_IRQ(12)
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#define DOZEPIU_IRQ SYSINT1_IRQ(13)
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#define SYSINT1_IRQ_LAST DOZEPIU_IRQ
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/* SYSINT2 Interrupt Numbers */
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#define SYSINT2_IRQ_BASE 24
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#define SYSINT2_IRQ(x) (SYSINT2_IRQ_BASE + (x))
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#define RTCLONG2_IRQ SYSINT2_IRQ(0)
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#define LED_IRQ SYSINT2_IRQ(1)
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#define HSP_IRQ SYSINT2_IRQ(2)
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#define TCLOCK_IRQ SYSINT2_IRQ(3)
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#define FIR_IRQ SYSINT2_IRQ(4)
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#define CEU_IRQ SYSINT2_IRQ(4) /* same number as FIR_IRQ */
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#define DSIU_IRQ SYSINT2_IRQ(5)
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#define PCI_IRQ SYSINT2_IRQ(6)
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#define SCU_IRQ SYSINT2_IRQ(7)
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#define CSI_IRQ SYSINT2_IRQ(8)
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#define BCU_IRQ SYSINT2_IRQ(9)
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#define ETHERNET_IRQ SYSINT2_IRQ(10)
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#define SYSINT2_IRQ_LAST ETHERNET_IRQ
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/* GIU Interrupt Numbers */
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#define GIU_IRQ_BASE 40
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#define GIU_IRQ(x) (GIU_IRQ_BASE + (x)) /* IRQ 40-71 */
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#define GIU_IRQ_LAST GIU_IRQ(31)
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extern int vr41xx_set_intassign(unsigned int irq, unsigned char intassign);
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extern int cascade_irq(unsigned int irq, int (*get_irq)(unsigned int, struct pt_regs *));
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#include <asm/io.h>
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/*
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* Interrupt Number
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*/
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#define VRC4173_IRQ_BASE 72
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#define VRC4173_IRQ(x) (VRC4173_IRQ_BASE + (x))
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#define VRC4173_USB_IRQ VRC4173_IRQ(0)
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#define VRC4173_PCMCIA2_IRQ VRC4173_IRQ(1)
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#define VRC4173_PCMCIA1_IRQ VRC4173_IRQ(2)
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#define VRC4173_PS2CH2_IRQ VRC4173_IRQ(3)
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#define VRC4173_PS2CH1_IRQ VRC4173_IRQ(4)
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#define VRC4173_PIU_IRQ VRC4173_IRQ(5)
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#define VRC4173_AIU_IRQ VRC4173_IRQ(6)
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#define VRC4173_KIU_IRQ VRC4173_IRQ(7)
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#define VRC4173_GIU_IRQ VRC4173_IRQ(8)
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#define VRC4173_AC97_IRQ VRC4173_IRQ(9)
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#define VRC4173_AC97INT1_IRQ VRC4173_IRQ(10)
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/* RFU */
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#define VRC4173_DOZEPIU_IRQ VRC4173_IRQ(13)
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#define VRC4173_IRQ_LAST VRC4173_DOZEPIU_IRQ
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/*
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* PCI I/O accesses
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*/
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