arm64: dts: uniphier: rename PH1-LD10 to PH1-LD20
Due to the company's awful projecting, this chip has been renamed to PH1-LD20. It has not been shipped yet, this change would have no impact on our customers. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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@ -1,4 +1,4 @@
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dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld10-ref.dtb
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dtb-$(CONFIG_ARCH_UNIPHIER) += uniphier-ph1-ld20-ref.dtb
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always := $(dtb-y)
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clean-files := *.dtb
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@ -1,5 +1,5 @@
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/*
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* Device Tree Source for UniPhier PH1-LD10 Reference Board
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* Device Tree Source for UniPhier PH1-LD20 Reference Board
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*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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@ -43,12 +43,12 @@
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*/
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/dts-v1/;
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/include/ "uniphier-ph1-ld10.dtsi"
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/include/ "uniphier-ph1-ld20.dtsi"
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/include/ "uniphier-support-card.dtsi"
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/ {
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model = "UniPhier PH1-LD10 Reference Board";
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compatible = "socionext,ph1-ld10-ref", "socionext,ph1-ld10";
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model = "UniPhier PH1-LD20 Reference Board";
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compatible = "socionext,ph1-ld20-ref", "socionext,ph1-ld20";
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memory {
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device_type = "memory";
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@ -1,5 +1,5 @@
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/*
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* Device Tree Source for UniPhier PH1-LD10 SoC
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* Device Tree Source for UniPhier PH1-LD20 SoC
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*
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* Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
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*
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@ -43,7 +43,7 @@
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*/
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/ {
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compatible = "socionext,ph1-ld10";
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compatible = "socionext,ph1-ld20";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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@ -262,7 +262,7 @@
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};
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pinctrl: pinctrl@5f801000 {
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compatible = "socionext,ph1-ld10-pinctrl", "syscon";
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compatible = "socionext,ph1-ld20-pinctrl", "syscon";
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reg = <0x5f801000 0xe00>;
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};
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