ARM: dts: fix clock-frequency of display timing0 for exynos3250-rinato
After the commitabc0b1447d
("drm: Perform basic sanity checks on probed modes"), proper clock-frequency becomes mandatory for validating the mode of panel. The display does not work if there is no mode validated. Also, this clock-frequency must be set appropriately for getting required frame rate. Fixes:abc0b1447d
("drm: Perform basic sanity checks on probed modes") Cc: <stable@vger.kernel.org> Signed-off-by: Hyungwon Hwang <human.hwang@samsung.com> Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Sigend-off-by: Kukjin Kim <kgene@kernel.org>
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@ -182,7 +182,7 @@
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display-timings {
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timing-0 {
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clock-frequency = <0>;
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clock-frequency = <4600000>;
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hactive = <320>;
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vactive = <320>;
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hfront-porch = <1>;
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