ARM: OMAP4: clockdomain/CM code: Update supported transition modes
For OMAP3+ devices, the clock domains (CLKDMs) support one or more of the following transition modes ... NO_SLEEP (0x0) - A clock domain sleep transition is never initiated, irrespective of the hardware conditions. SW_SLEEP (0x1) - A software-forced sleep transition. The transition is initiated when the associated hardware conditions are satisfied SW_WKUP (0x2) - A software-forced clock domain wake-up transition is initiated, irrespective of the hardware conditions. HW_AUTO (0x3) - Hardware-controlled automatic sleep and wake-up transition is initiated by the PRCM module when the associated hardware conditions are satisfied. For OMAP4 devices, SW_SLEEP is equivalent to HW_AUTO and NO_SLEEP is equivalent to SW_WKUP. The only difference between HW_AUTO and SW_SLEEP for OMAP4 devices is that the PRM_IRQSTATUS_MPU.TRANSITION_ST interrupt status is set in case of SW_SLEEP transition, and not set in case of HW_AUTO transition. For OMAP4 devices, all CLKDMs support HW_AUTO and therefore we can place the CLKDMs in the HW_AUTO state instead of the SW_SLEEP mode. Hence, we do not need to use the SW_SLEEP mode. With regard to NO_SLEEP and SW_WKUP it is preferred to use SW_WKUP mode if the CLKDM supports it and so use this mode instead of NO_SLEEP where possible. For a software perspective the above 4 modes are represented by the following flags to indicate what modes are supported by each of the CLKDMs. CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> SW_SLEEP CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP By eliminating the SW_SLEEP mode the the mapping of the flags for OMAP4 devices can becomes ... CLKDM_CAN_DISABLE_AUTO --> NO_SLEEP CLKDM_CAN_ENABLE_AUTO --> HW_AUTO CLKDM_CAN_FORCE_SLEEP --> HW_AUTO CLKDM_CAN_FORCE_WAKEUP --> SW_WKUP Cc: Ming Lei <ming.lei@canonical.com> Cc: Will Deacon <will.deacon@arm.com> Cc: Benoit Cousson <b-cousson@ti.com> Cc: Paul Walmsley <paul@pwsan.com> Cc: Kevin Hilman <khilman@ti.com> Reviewed-by: Benoit Cousson <b-cousson@ti.com> Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com> Signed-off-by: Jon Hunter <jon-hunter@ti.com> Signed-off-by: Paul Walmsley <paul@pwsan.com>
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@ -70,7 +70,7 @@ static int omap4_clkdm_clear_all_wkup_sleep_deps(struct clockdomain *clkdm)
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static int omap4_clkdm_sleep(struct clockdomain *clkdm)
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{
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omap4_cminst_clkdm_force_sleep(clkdm->prcm_partition,
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omap4_cminst_clkdm_enable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs);
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return 0;
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}
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@ -90,8 +90,12 @@ static void omap4_clkdm_allow_idle(struct clockdomain *clkdm)
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static void omap4_clkdm_deny_idle(struct clockdomain *clkdm)
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{
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omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst, clkdm->clkdm_offs);
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if (clkdm->flags & CLKDM_CAN_FORCE_WAKEUP)
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omap4_clkdm_wakeup(clkdm);
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else
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omap4_cminst_clkdm_disable_hwsup(clkdm->prcm_partition,
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clkdm->cm_inst,
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clkdm->clkdm_offs);
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}
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static int omap4_clkdm_clk_enable(struct clockdomain *clkdm)
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@ -234,20 +234,6 @@ void omap4_cminst_clkdm_disable_hwsup(u8 part, s16 inst, u16 cdoffs)
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_clktrctrl_write(OMAP34XX_CLKSTCTRL_DISABLE_AUTO, part, inst, cdoffs);
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}
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/**
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* omap4_cminst_clkdm_force_sleep - try to put a clockdomain into idle
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* @part: PRCM partition ID that the clockdomain registers exist in
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* @inst: CM instance register offset (*_INST macro)
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* @cdoffs: Clockdomain register offset (*_CDOFFS macro)
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*
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* Put a clockdomain referred to by (@part, @inst, @cdoffs) into idle
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* No return value.
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*/
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void omap4_cminst_clkdm_force_sleep(u8 part, s16 inst, u16 cdoffs)
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{
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_clktrctrl_write(OMAP34XX_CLKSTCTRL_FORCE_SLEEP, part, inst, cdoffs);
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}
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/**
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* omap4_cminst_clkdm_force_sleep - try to take a clockdomain out of idle
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* @part: PRCM partition ID that the clockdomain registers exist in
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