Merge branch 'omap-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap-2.6
This commit is contained in:
commit
6597cb84c8
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@ -429,18 +429,16 @@ void __init gpmc_init(void)
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gpmc_l3_clk = clk_get(NULL, ck);
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if (IS_ERR(gpmc_l3_clk)) {
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printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
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return -ENODEV;
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BUG();
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}
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gpmc_base = ioremap(l, SZ_4K);
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if (!gpmc_base) {
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clk_put(gpmc_l3_clk);
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printk(KERN_ERR "Could not get GPMC register memory\n");
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return -ENOMEM;
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BUG();
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}
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BUG_ON(IS_ERR(gpmc_l3_clk));
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l = gpmc_read_reg(GPMC_REVISION);
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printk(KERN_INFO "GPMC revision %d.%d\n", (l >> 4) & 0x0f, l & 0x0f);
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/* Set smart idle mode and automatic L3 clock gating */
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@ -428,23 +428,23 @@ static int clk_debugfs_register_one(struct clk *c)
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if (c->id != 0)
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sprintf(p, ":%d", c->id);
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d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
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if (IS_ERR(d))
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return PTR_ERR(d);
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if (!d)
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return -ENOMEM;
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c->dent = d;
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d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
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if (IS_ERR(d)) {
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err = PTR_ERR(d);
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if (!d) {
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err = -ENOMEM;
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goto err_out;
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}
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d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
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if (IS_ERR(d)) {
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err = PTR_ERR(d);
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if (!d) {
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err = -ENOMEM;
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goto err_out;
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}
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d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
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if (IS_ERR(d)) {
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err = PTR_ERR(d);
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if (!d) {
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err = -ENOMEM;
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goto err_out;
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}
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return 0;
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@ -483,8 +483,8 @@ static int __init clk_debugfs_init(void)
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int err;
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d = debugfs_create_dir("clock", NULL);
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if (IS_ERR(d))
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return PTR_ERR(d);
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if (!d)
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return -ENOMEM;
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clk_debugfs_root = d;
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list_for_each_entry(c, &clocks, node) {
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@ -65,7 +65,8 @@
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#include <mach/omap34xx.h>
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#endif
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#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt number */
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#define INTCPS_SIR_IRQ_OFFSET 0x0040 /* Active interrupt offset */
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#define ACTIVEIRQ_MASK 0x7f /* Active interrupt bits */
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.macro disable_fiq
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.endm
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@ -88,6 +89,7 @@
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cmp \irqnr, #0x0
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2222:
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ldrne \irqnr, [\base, #INTCPS_SIR_IRQ_OFFSET]
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and \irqnr, \irqnr, #ACTIVEIRQ_MASK /* Clear spurious bits */
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.endm
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@ -372,7 +372,7 @@
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/* External TWL4030 gpio interrupts are optional */
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#define TWL4030_GPIO_IRQ_BASE TWL4030_PWR_IRQ_END
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#ifdef CONFIG_TWL4030_GPIO
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#ifdef CONFIG_GPIO_TWL4030
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#define TWL4030_GPIO_NR_IRQS 18
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#else
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#define TWL4030_GPIO_NR_IRQS 0
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