ARM: dts: sun9i: a80-optimus: Order nodes by alphabetical order
Move the mmc nodes above the ohci nodes for proper ordering by name. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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@ -119,6 +119,31 @@
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status = "okay";
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <4>;
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cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
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cd-inverted;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_pins>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&mmc2_8bit_pins {
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/* Increase drive strength for DDR modes */
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allwinner,drive = <SUN4I_PINCTRL_40_MA>;
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};
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&ohci0 {
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status = "okay";
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};
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@ -157,31 +182,6 @@
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};
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};
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&mmc0 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc0_pins>, <&mmc0_cd_pin_optimus>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <4>;
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cd-gpios = <&pio 7 18 GPIO_ACTIVE_HIGH>; /* PH8 */
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cd-inverted;
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status = "okay";
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};
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&mmc2 {
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pinctrl-names = "default";
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pinctrl-0 = <&mmc2_8bit_pins>;
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vmmc-supply = <®_dcdc1>;
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bus-width = <8>;
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non-removable;
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cap-mmc-hw-reset;
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status = "okay";
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};
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&mmc2_8bit_pins {
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/* Increase drive strength for DDR modes */
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allwinner,drive = <SUN4I_PINCTRL_40_MA>;
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};
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&r_ir {
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status = "okay";
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};
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