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staging: comedi: me_daq: fix me_ai_insn_read() 

The comedi core expects (*insn_read) functions to return insn->n data
values. Refactor the function to work like the core expects. For
aesthetics, use the comedi_offset_munge() helper to munge the 2's
complement data.

This also fixes a minor issue when comedi_timeout() times out. Currently
this function just returns which leaves the ADC mode programmed for
software triggering. With the refactor the ADC mode is always disabled
when the function exits. This allows removing the unnecessary steps to
"stop any running conversions" at the start of the function.

Signed-off-by: H Hartley Sweeten <hsweeten@visionengravers.com>
Reviewed-by: Ian Abbott <abbotti@mev.co.uk>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
H Hartley Sweeten 2015-10-06 17:23:44 -07:00 committed by Greg Kroah-Hartman
parent 8a844a91ca
commit 651659c133
1 changed files with 17 additions and 17 deletions
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34
drivers/staging/comedi/drivers/me_daq.c
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@ -243,8 +243,9 @@ static int me_ai_insn_read(struct comedi_device *dev,
unsigned int chan = CR_CHAN(insn->chanspec);
unsigned int range = CR_RANGE(insn->chanspec);
unsigned int aref = CR_AREF(insn->chanspec);
unsigned short val;
int ret;
unsigned int val;
int ret = 0;
int i;
/*
* For differential operation, there are only 8 input channels
@ -255,10 +256,6 @@ static int me_ai_insn_read(struct comedi_device *dev,
return -EINVAL;
}
/* stop any running conversion */
devpriv->ctrl1 &= ~ME_CTRL1_ADC_MODE_MASK;
writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG);
/* clear chanlist and ad fifo */
devpriv->ctrl2 &= ~(ME_CTRL2_ADFIFO_ENA | ME_CTRL2_CHANLIST_ENA);
writew(devpriv->ctrl2, dev->mmio + ME_CTRL2_REG);
@ -281,24 +278,27 @@ static int me_ai_insn_read(struct comedi_device *dev,
devpriv->ctrl1 |= ME_CTRL1_ADC_MODE_SOFT_TRIG;
writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG);
/* start ai conversion */
readw(dev->mmio + ME_CTRL1_REG);
for (i = 0; i < insn->n; i++) {
/* start ai conversion */
readw(dev->mmio + ME_CTRL1_REG);
/* wait for ADC fifo not empty flag */
ret = comedi_timeout(dev, s, insn, me_ai_eoc, 0);
if (ret)
return ret;
/* wait for ADC fifo not empty flag */
ret = comedi_timeout(dev, s, insn, me_ai_eoc, 0);
if (ret)
break;
/* get value from ADC fifo */
val = readw(dev->mmio + ME_AI_FIFO_REG);
val = (val ^ 0x800) & 0x0fff;
data[0] = val;
/* get value from ADC fifo */
val = readw(dev->mmio + ME_AI_FIFO_REG) & s->maxdata;
/* munge 2's complement value to offset binary */
data[i] = comedi_offset_munge(s, val);
}
/* stop any running conversion */
devpriv->ctrl1 &= ~ME_CTRL1_ADC_MODE_MASK;
writew(devpriv->ctrl1, dev->mmio + ME_CTRL1_REG);
return 1;
return ret ? ret : insn->n;
}
static int me_ao_insn_write(struct comedi_device *dev,