mtd: spi-nor: Create a ->set_4byte() method
The procedure used to enable 4 byte addressing mode depends on the NOR device, so let's provide a hook so that manufacturer specific handling can be implemented in a sane way. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> [tudor.ambarus@microchip.com: use nor->params.set_4byte() instead of nor->set_4byte()] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
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@ -633,6 +633,17 @@ static int macronix_set_4byte(struct spi_nor *nor, bool enable)
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NULL, 0);
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}
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static int st_micron_set_4byte(struct spi_nor *nor, bool enable)
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{
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int ret;
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write_enable(nor);
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ret = macronix_set_4byte(nor, enable);
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write_disable(nor);
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return ret;
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}
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static int spansion_set_4byte(struct spi_nor *nor, bool enable)
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{
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nor->bouncebuf[0] = enable << 7;
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@ -667,45 +678,24 @@ static int spi_nor_write_ear(struct spi_nor *nor, u8 ear)
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return nor->write_reg(nor, SPINOR_OP_WREAR, nor->bouncebuf, 1);
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}
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/* Enable/disable 4-byte addressing mode. */
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static int set_4byte(struct spi_nor *nor, bool enable)
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static int winbond_set_4byte(struct spi_nor *nor, bool enable)
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{
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int status;
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bool need_wren = false;
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int ret;
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switch (JEDEC_MFR(nor->info)) {
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case SNOR_MFR_ST:
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case SNOR_MFR_MICRON:
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/* Some Micron need WREN command; all will accept it */
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need_wren = true;
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/* fall through */
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case SNOR_MFR_MACRONIX:
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case SNOR_MFR_WINBOND:
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if (need_wren)
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write_enable(nor);
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ret = macronix_set_4byte(nor, enable);
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if (ret || enable)
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return ret;
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status = macronix_set_4byte(nor, enable);
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if (need_wren)
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write_disable(nor);
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/*
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* On Winbond W25Q256FV, leaving 4byte mode causes the Extended Address
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* Register to be set to 1, so all 3-byte-address reads come from the
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* second 16M. We must clear the register to enable normal behavior.
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*/
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write_enable(nor);
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ret = spi_nor_write_ear(nor, 0);
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write_disable(nor);
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if (!status && !enable &&
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JEDEC_MFR(nor->info) == SNOR_MFR_WINBOND) {
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/*
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* On Winbond W25Q256FV, leaving 4byte mode causes
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* the Extended Address Register to be set to 1, so all
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* 3-byte-address reads come from the second 16M.
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* We must clear the register to enable normal behavior.
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*/
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write_enable(nor);
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spi_nor_write_ear(nor, 0);
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write_disable(nor);
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}
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return status;
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default:
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/* Spansion style */
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return spansion_set_4byte(nor, enable);
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}
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return ret;
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}
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static int spi_nor_xread_sr(struct spi_nor *nor, u8 *sr)
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@ -4153,11 +4143,18 @@ exit:
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static void macronix_set_default_init(struct spi_nor *nor)
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{
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nor->params.quad_enable = macronix_quad_enable;
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nor->params.set_4byte = macronix_set_4byte;
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}
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static void st_micron_set_default_init(struct spi_nor *nor)
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{
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nor->params.quad_enable = NULL;
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nor->params.set_4byte = st_micron_set_4byte;
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}
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static void winbond_set_default_init(struct spi_nor *nor)
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{
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nor->params.set_4byte = winbond_set_4byte;
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}
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/**
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@ -4178,6 +4175,10 @@ static void spi_nor_manufacturer_init_params(struct spi_nor *nor)
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st_micron_set_default_init(nor);
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break;
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case SNOR_MFR_WINBOND:
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winbond_set_default_init(nor);
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break;
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default:
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break;
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}
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@ -4222,6 +4223,7 @@ static void spi_nor_info_init_params(struct spi_nor *nor)
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/* Initialize legacy flash parameters and settings. */
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params->quad_enable = spansion_quad_enable;
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params->set_4byte = spansion_set_4byte;
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/* Set SPI NOR sizes. */
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params->size = (u64)info->sector_size * info->n_sectors;
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@ -4587,7 +4589,7 @@ static int spi_nor_init(struct spi_nor *nor)
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*/
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WARN_ONCE(nor->flags & SNOR_F_BROKEN_RESET,
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"enabling reset hack; may not recover from unexpected reboots\n");
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set_4byte(nor, true);
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nor->params.set_4byte(nor, true);
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}
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return 0;
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@ -4611,7 +4613,7 @@ void spi_nor_restore(struct spi_nor *nor)
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/* restore the addressing mode */
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if (nor->addr_width == 4 && !(nor->flags & SNOR_F_4B_OPCODES) &&
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nor->flags & SNOR_F_BROKEN_RESET)
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set_4byte(nor, false);
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nor->params.set_4byte(nor, false);
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}
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EXPORT_SYMBOL_GPL(spi_nor_restore);
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@ -482,6 +482,7 @@ struct spi_nor;
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* @erase_map: the erase map parsed from the SFDP Sector Map Parameter
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* Table.
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* @quad_enable: enables SPI NOR quad mode.
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* @set_4byte: puts the SPI NOR in 4 byte addressing mode.
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*/
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struct spi_nor_flash_parameter {
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u64 size;
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@ -494,6 +495,7 @@ struct spi_nor_flash_parameter {
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struct spi_nor_erase_map erase_map;
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int (*quad_enable)(struct spi_nor *nor);
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int (*set_4byte)(struct spi_nor *nor, bool enable);
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};
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/**
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