drm/radeon: implement output csc property for DCE5+
Implement the property for DCE5+ asics. Older asics require a slightly more complex process. bug: https://bugs.freedesktop.org/show_bug.cgi?id=83226 Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2069,6 +2069,12 @@ static bool atombios_crtc_mode_fixup(struct drm_crtc *crtc,
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radeon_crtc->connector = NULL;
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return false;
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}
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if (radeon_crtc->encoder) {
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struct radeon_encoder *radeon_encoder =
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to_radeon_encoder(radeon_crtc->encoder);
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radeon_crtc->output_csc = radeon_encoder->output_csc;
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}
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if (!radeon_crtc_scaling_mode_fixup(crtc, mode, adjusted_mode))
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return false;
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if (!atombios_crtc_prepare_pll(crtc, adjusted_mode))
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@ -725,6 +725,30 @@ static int radeon_connector_set_property(struct drm_connector *connector, struct
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radeon_property_change_mode(&radeon_encoder->base);
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}
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if (property == rdev->mode_info.output_csc_property) {
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if (connector->encoder)
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radeon_encoder = to_radeon_encoder(connector->encoder);
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else {
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struct drm_connector_helper_funcs *connector_funcs = connector->helper_private;
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radeon_encoder = to_radeon_encoder(connector_funcs->best_encoder(connector));
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}
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if (radeon_encoder->output_csc == val)
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return 0;
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radeon_encoder->output_csc = val;
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if (connector->encoder->crtc) {
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struct drm_crtc *crtc = connector->encoder->crtc;
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struct drm_crtc_helper_funcs *crtc_funcs = crtc->helper_private;
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struct radeon_crtc *radeon_crtc = to_radeon_crtc(crtc);
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radeon_crtc->output_csc = radeon_encoder->output_csc;
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(*crtc_funcs->load_lut)(crtc);
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}
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}
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return 0;
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}
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@ -1872,6 +1896,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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drm_object_attach_property(&radeon_connector->base.base,
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dev->mode_config.scaling_mode_property,
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DRM_MODE_SCALE_NONE);
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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break;
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case DRM_MODE_CONNECTOR_DVII:
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case DRM_MODE_CONNECTOR_DVID:
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@ -1904,6 +1932,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.audio_property,
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RADEON_AUDIO_AUTO);
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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subpixel_order = SubPixelHorizontalRGB;
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connector->interlace_allowed = true;
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@ -1950,6 +1982,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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drm_object_attach_property(&radeon_connector->base.base,
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dev->mode_config.scaling_mode_property,
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DRM_MODE_SCALE_NONE);
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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/* no HPD on analog connectors */
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radeon_connector->hpd.hpd = RADEON_HPD_NONE;
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connector->polled = DRM_CONNECTOR_POLL_CONNECT;
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@ -1972,6 +2008,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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drm_object_attach_property(&radeon_connector->base.base,
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dev->mode_config.scaling_mode_property,
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DRM_MODE_SCALE_NONE);
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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/* no HPD on analog connectors */
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radeon_connector->hpd.hpd = RADEON_HPD_NONE;
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connector->interlace_allowed = true;
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@ -2023,6 +2063,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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rdev->mode_info.load_detect_property,
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1);
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}
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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connector->interlace_allowed = true;
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if (connector_type == DRM_MODE_CONNECTOR_DVII)
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connector->doublescan_allowed = true;
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@ -2068,6 +2112,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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rdev->mode_info.audio_property,
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RADEON_AUDIO_AUTO);
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}
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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subpixel_order = SubPixelHorizontalRGB;
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connector->interlace_allowed = true;
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if (connector_type == DRM_MODE_CONNECTOR_HDMIB)
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@ -2116,6 +2164,10 @@ radeon_add_atom_connector(struct drm_device *dev,
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rdev->mode_info.audio_property,
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RADEON_AUDIO_AUTO);
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}
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if (ASIC_IS_DCE5(rdev))
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drm_object_attach_property(&radeon_connector->base.base,
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rdev->mode_info.output_csc_property,
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RADEON_OUTPUT_CSC_BYPASS);
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connector->interlace_allowed = true;
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/* in theory with a DP to VGA converter... */
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connector->doublescan_allowed = false;
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@ -154,7 +154,7 @@ static void dce5_crtc_load_lut(struct drm_crtc *crtc)
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(NI_GRPH_REGAMMA_MODE(NI_REGAMMA_BYPASS) |
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NI_OVL_REGAMMA_MODE(NI_REGAMMA_BYPASS)));
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WREG32(NI_OUTPUT_CSC_CONTROL + radeon_crtc->crtc_offset,
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(NI_OUTPUT_CSC_GRPH_MODE(NI_OUTPUT_CSC_BYPASS) |
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(NI_OUTPUT_CSC_GRPH_MODE(radeon_crtc->output_csc) |
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NI_OUTPUT_CSC_OVL_MODE(NI_OUTPUT_CSC_BYPASS)));
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/* XXX match this to the depth of the crtc fmt block, move to modeset? */
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WREG32(0x6940 + radeon_crtc->crtc_offset, 0);
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@ -366,6 +366,7 @@ struct radeon_crtc {
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u32 wm_low;
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u32 wm_high;
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struct drm_display_mode hw_mode;
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enum radeon_output_csc output_csc;
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};
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struct radeon_encoder_primary_dac {
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@ -459,6 +460,7 @@ struct radeon_encoder {
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bool is_ext_encoder;
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u16 caps;
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struct radeon_audio_funcs *audio;
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enum radeon_output_csc output_csc;
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};
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struct radeon_connector_atom_dig {
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