net:hns: Add Hip06 "TSO(TCP Segment Offload)" support HNS Driver
This patch adds the support of "TSO (TCP Segment Offload)" feature provided by the Hip06 ethernet hardware to the HNS ethernet driver. Enabling this feature would help offload the TCP Segmentation process to the Hip06 ethernet hardware. This eventually would help in saving precious cpu cycles. Signed-off-by: Salil Mehta <salil.mehta@huawei.com> Signed-off-by: lisheng <lisheng011@huawei.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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6bc0ce7d9a
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64353af639
drivers/net/ethernet/hisilicon/hns
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@ -474,6 +474,7 @@ struct hnae_ae_ops {
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int (*set_mac_addr)(struct hnae_handle *handle, void *p);
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int (*set_mc_addr)(struct hnae_handle *handle, void *addr);
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int (*set_mtu)(struct hnae_handle *handle, int new_mtu);
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void (*set_tso_stats)(struct hnae_handle *handle, int enable);
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void (*update_stats)(struct hnae_handle *handle,
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struct net_device_stats *net_stats);
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void (*get_stats)(struct hnae_handle *handle, u64 *data);
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@ -277,6 +277,13 @@ static int hns_ae_set_mtu(struct hnae_handle *handle, int new_mtu)
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return hns_mac_set_mtu(mac_cb, new_mtu);
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}
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static void hns_ae_set_tso_stats(struct hnae_handle *handle, int enable)
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{
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struct hns_ppe_cb *ppe_cb = hns_get_ppe_cb(handle);
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hns_ppe_set_tso_enable(ppe_cb, enable);
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}
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static int hns_ae_start(struct hnae_handle *handle)
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{
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int ret;
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@ -824,6 +831,7 @@ static struct hnae_ae_ops hns_dsaf_ops = {
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.set_mc_addr = hns_ae_set_multicast_one,
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.set_mtu = hns_ae_set_mtu,
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.update_stats = hns_ae_update_stats,
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.set_tso_stats = hns_ae_set_tso_stats,
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.get_stats = hns_ae_get_stats,
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.get_strings = hns_ae_get_strings,
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.get_sset_count = hns_ae_get_sset_count,
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@ -19,6 +19,11 @@
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#include "hns_dsaf_ppe.h"
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void hns_ppe_set_tso_enable(struct hns_ppe_cb *ppe_cb, u32 value)
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{
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dsaf_set_dev_bit(ppe_cb, PPEV2_CFG_TSO_EN_REG, 0, !!value);
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}
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void hns_ppe_set_rss_key(struct hns_ppe_cb *ppe_cb,
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const u32 rss_key[HNS_PPEV2_RSS_KEY_NUM])
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{
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@ -113,7 +113,7 @@ void hns_ppe_get_regs(struct hns_ppe_cb *ppe_cb, void *data);
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void hns_ppe_get_strings(struct hns_ppe_cb *ppe_cb, int stringset, u8 *data);
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void hns_ppe_get_stats(struct hns_ppe_cb *ppe_cb, u64 *data);
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void hns_ppe_set_tso_enable(struct hns_ppe_cb *ppe_cb, u32 value);
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void hns_ppe_set_rss_key(struct hns_ppe_cb *ppe_cb,
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const u32 rss_key[HNS_PPEV2_RSS_KEY_NUM]);
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void hns_ppe_set_indir_table(struct hns_ppe_cb *ppe_cb,
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@ -317,6 +317,7 @@
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#define PPE_CFG_TAG_GEN_REG 0x90
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#define PPE_CFG_PARSE_TAG_REG 0x94
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#define PPE_CFG_PRO_CHECK_EN_REG 0x98
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#define PPEV2_CFG_TSO_EN_REG 0xA0
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#define PPE_INTEN_REG 0x100
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#define PPE_RINT_REG 0x104
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#define PPE_INTSTS_REG 0x108
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@ -223,6 +223,71 @@ static int hns_nic_maybe_stop_tx(
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return 0;
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}
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static int hns_nic_maybe_stop_tso(
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struct sk_buff **out_skb, int *bnum, struct hnae_ring *ring)
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{
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int i;
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int size;
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int buf_num;
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int frag_num;
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struct sk_buff *skb = *out_skb;
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struct sk_buff *new_skb = NULL;
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struct skb_frag_struct *frag;
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size = skb_headlen(skb);
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buf_num = (size + BD_MAX_SEND_SIZE - 1) / BD_MAX_SEND_SIZE;
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frag_num = skb_shinfo(skb)->nr_frags;
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for (i = 0; i < frag_num; i++) {
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frag = &skb_shinfo(skb)->frags[i];
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size = skb_frag_size(frag);
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buf_num += (size + BD_MAX_SEND_SIZE - 1) / BD_MAX_SEND_SIZE;
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}
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if (unlikely(buf_num > ring->max_desc_num_per_pkt)) {
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buf_num = (skb->len + BD_MAX_SEND_SIZE - 1) / BD_MAX_SEND_SIZE;
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if (ring_space(ring) < buf_num)
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return -EBUSY;
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/* manual split the send packet */
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new_skb = skb_copy(skb, GFP_ATOMIC);
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if (!new_skb)
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return -ENOMEM;
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dev_kfree_skb_any(skb);
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*out_skb = new_skb;
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} else if (ring_space(ring) < buf_num) {
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return -EBUSY;
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}
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*bnum = buf_num;
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return 0;
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}
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static void fill_tso_desc(struct hnae_ring *ring, void *priv,
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int size, dma_addr_t dma, int frag_end,
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int buf_num, enum hns_desc_type type, int mtu)
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{
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int frag_buf_num;
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int sizeoflast;
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int k;
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frag_buf_num = (size + BD_MAX_SEND_SIZE - 1) / BD_MAX_SEND_SIZE;
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sizeoflast = size % BD_MAX_SEND_SIZE;
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sizeoflast = sizeoflast ? sizeoflast : BD_MAX_SEND_SIZE;
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/* when the frag size is bigger than hardware, split this frag */
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for (k = 0; k < frag_buf_num; k++)
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fill_v2_desc(ring, priv,
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(k == frag_buf_num - 1) ?
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sizeoflast : BD_MAX_SEND_SIZE,
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dma + BD_MAX_SEND_SIZE * k,
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frag_end && (k == frag_buf_num - 1) ? 1 : 0,
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buf_num,
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(type == DESC_TYPE_SKB && !k) ?
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DESC_TYPE_SKB : DESC_TYPE_PAGE,
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mtu);
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}
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int hns_nic_net_xmit_hw(struct net_device *ndev,
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struct sk_buff *skb,
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struct hns_nic_ring_data *ring_data)
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@ -1637,6 +1702,7 @@ static void hns_nic_uninit_ring_data(struct hns_nic_priv *priv)
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static void hns_nic_set_priv_ops(struct net_device *netdev)
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{
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struct hns_nic_priv *priv = netdev_priv(netdev);
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struct hnae_handle *h = priv->ae_handle;
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if (AE_IS_VER1(priv->enet_ver)) {
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priv->ops.fill_desc = fill_desc;
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@ -1644,8 +1710,17 @@ static void hns_nic_set_priv_ops(struct net_device *netdev)
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priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
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} else {
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priv->ops.get_rxd_bnum = get_v2rx_desc_bnum;
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priv->ops.fill_desc = fill_v2_desc;
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priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
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if ((netdev->features & NETIF_F_TSO) ||
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(netdev->features & NETIF_F_TSO6)) {
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priv->ops.fill_desc = fill_tso_desc;
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priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tso;
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/* This chip only support 7*4096 */
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netif_set_gso_max_size(netdev, 7 * 4096);
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h->dev->ops->set_tso_stats(h, 1);
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} else {
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priv->ops.fill_desc = fill_v2_desc;
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priv->ops.maybe_stop_tx = hns_nic_maybe_stop_tx;
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}
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}
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}
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@ -1758,9 +1833,10 @@ static int hns_nic_dev_probe(struct platform_device *pdev)
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switch (priv->enet_ver) {
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case AE_VERSION_2:
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ndev->features |= NETIF_F_TSO | NETIF_F_TSO6;
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ndev->hw_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
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NETIF_F_RXCSUM | NETIF_F_SG | NETIF_F_GSO |
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NETIF_F_GRO;
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NETIF_F_GRO | NETIF_F_TSO | NETIF_F_TSO6;
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break;
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default:
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break;
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