I2C Documentation and binding fixes and improvements
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This commit is contained in:
commit
6429883ab1
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@ -60,6 +60,9 @@ properties:
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power-domains:
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maxItems: 1
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resets:
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maxItems: 1
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required:
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- compatible
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- reg
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@ -64,7 +64,7 @@ correct address for this module, you could get in big trouble (read:
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crashes, data corruption, etc.). Try this only as a last resort (try BIOS
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updates first, for example), and backup first! An even more dangerous
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option is 'force_addr=<IOPORT>'. This will not only enable the PIIX4 like
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'force' foes, but it will also set a new base I/O port address. The SMBus
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'force' does, but it will also set a new base I/O port address. The SMBus
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parts of the PIIX4 needs a range of 8 of these addresses to function
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correctly. If these addresses are already reserved by some other device,
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you will get into big trouble! DON'T USE THIS IF YOU ARE NOT VERY SURE
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@ -86,15 +86,15 @@ If you own Force CPCI735 motherboard or other OSB4 based systems you may need
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to change the SMBus Interrupt Select register so the SMBus controller uses
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the SMI mode.
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1) Use lspci command and locate the PCI device with the SMBus controller:
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1) Use ``lspci`` command and locate the PCI device with the SMBus controller:
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00:0f.0 ISA bridge: ServerWorks OSB4 South Bridge (rev 4f)
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The line may vary for different chipsets. Please consult the driver source
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for all possible PCI ids (and lspci -n to match them). Lets assume the
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for all possible PCI ids (and ``lspci -n`` to match them). Let's assume the
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device is located at 00:0f.0.
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2) Now you just need to change the value in 0xD2 register. Get it first with
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command: lspci -xxx -s 00:0f.0
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command: ``lspci -xxx -s 00:0f.0``
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If the value is 0x3 then you need to change it to 0x1:
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setpci -s 00:0f.0 d2.b=1
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``setpci -s 00:0f.0 d2.b=1``
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Please note that you don't need to do that in all cases, just when the SMBus is
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not working properly.
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@ -109,6 +109,3 @@ which can easily get corrupted due to a state machine bug. These are mostly
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Thinkpad laptops, but desktop systems may also be affected. We have no list
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of all affected systems, so the only safe solution was to prevent access to
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the SMBus on all IBM systems (detected using DMI data.)
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For additional information, read:
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http://www.lm-sensors.org/browser/lm-sensors/trunk/README
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@ -5,6 +5,8 @@ I2C muxes and complex topologies
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There are a couple of reasons for building more complex I2C topologies
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than a straight-forward I2C bus with one adapter and one or more devices.
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Some example use cases are:
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1. A mux may be needed on the bus to prevent address collisions.
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2. The bus may be accessible from some external bus master, and arbitration
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@ -14,10 +16,10 @@ than a straight-forward I2C bus with one adapter and one or more devices.
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from the I2C bus, at least most of the time, and sits behind a gate
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that has to be operated before the device can be accessed.
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Etc
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===
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Several types of hardware components such as I2C muxes, I2C gates and I2C
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arbitrators allow to handle such needs.
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These constructs are represented as I2C adapter trees by Linux, where
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These components are represented as I2C adapter trees by Linux, where
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each adapter has a parent adapter (except the root adapter) and zero or
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more child adapters. The root adapter is the actual adapter that issues
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I2C transfers, and all adapters with a parent are part of an "i2c-mux"
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@ -35,46 +37,7 @@ Locking
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=======
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There are two variants of locking available to I2C muxes, they can be
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mux-locked or parent-locked muxes. As is evident from below, it can be
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useful to know if a mux is mux-locked or if it is parent-locked. The
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following list was correct at the time of writing:
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In drivers/i2c/muxes/:
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====================== =============================================
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i2c-arb-gpio-challenge Parent-locked
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i2c-mux-gpio Normally parent-locked, mux-locked iff
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all involved gpio pins are controlled by the
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same I2C root adapter that they mux.
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i2c-mux-gpmux Normally parent-locked, mux-locked iff
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specified in device-tree.
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i2c-mux-ltc4306 Mux-locked
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i2c-mux-mlxcpld Parent-locked
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i2c-mux-pca9541 Parent-locked
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i2c-mux-pca954x Parent-locked
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i2c-mux-pinctrl Normally parent-locked, mux-locked iff
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all involved pinctrl devices are controlled
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by the same I2C root adapter that they mux.
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i2c-mux-reg Parent-locked
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====================== =============================================
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In drivers/iio/:
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====================== =============================================
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gyro/mpu3050 Mux-locked
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imu/inv_mpu6050/ Mux-locked
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====================== =============================================
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In drivers/media/:
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======================= =============================================
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dvb-frontends/lgdt3306a Mux-locked
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dvb-frontends/m88ds3103 Parent-locked
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dvb-frontends/rtl2830 Parent-locked
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dvb-frontends/rtl2832 Mux-locked
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dvb-frontends/si2168 Mux-locked
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usb/cx231xx/ Parent-locked
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======================= =============================================
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mux-locked or parent-locked muxes.
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Mux-locked muxes
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@ -89,40 +52,8 @@ full transaction, unrelated I2C transfers may interleave the different
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stages of the transaction. This has the benefit that the mux driver
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may be easier and cleaner to implement, but it has some caveats.
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==== =====================================================================
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ML1. If you build a topology with a mux-locked mux being the parent
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of a parent-locked mux, this might break the expectation from the
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parent-locked mux that the root adapter is locked during the
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transaction.
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ML2. It is not safe to build arbitrary topologies with two (or more)
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mux-locked muxes that are not siblings, when there are address
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collisions between the devices on the child adapters of these
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non-sibling muxes.
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I.e. the select-transfer-deselect transaction targeting e.g. device
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address 0x42 behind mux-one may be interleaved with a similar
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operation targeting device address 0x42 behind mux-two. The
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intension with such a topology would in this hypothetical example
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be that mux-one and mux-two should not be selected simultaneously,
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but mux-locked muxes do not guarantee that in all topologies.
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ML3. A mux-locked mux cannot be used by a driver for auto-closing
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gates/muxes, i.e. something that closes automatically after a given
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number (one, in most cases) of I2C transfers. Unrelated I2C transfers
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may creep in and close prematurely.
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ML4. If any non-I2C operation in the mux driver changes the I2C mux state,
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the driver has to lock the root adapter during that operation.
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Otherwise garbage may appear on the bus as seen from devices
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behind the mux, when an unrelated I2C transfer is in flight during
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the non-I2C mux-changing operation.
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==== =====================================================================
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Mux-locked Example
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------------------
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~~~~~~~~~~~~~~~~~~
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::
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@ -153,6 +84,43 @@ This means that accesses to D2 are lockout out for the full duration
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of the entire operation. But accesses to D3 are possibly interleaved
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at any point.
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Mux-locked caveats
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~~~~~~~~~~~~~~~~~~
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When using a mux-locked mux, be aware of the following restrictions:
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[ML1]
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If you build a topology with a mux-locked mux being the parent
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of a parent-locked mux, this might break the expectation from the
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parent-locked mux that the root adapter is locked during the
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transaction.
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[ML2]
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It is not safe to build arbitrary topologies with two (or more)
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mux-locked muxes that are not siblings, when there are address
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collisions between the devices on the child adapters of these
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non-sibling muxes.
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I.e. the select-transfer-deselect transaction targeting e.g. device
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address 0x42 behind mux-one may be interleaved with a similar
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operation targeting device address 0x42 behind mux-two. The
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intent with such a topology would in this hypothetical example
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be that mux-one and mux-two should not be selected simultaneously,
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but mux-locked muxes do not guarantee that in all topologies.
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[ML3]
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A mux-locked mux cannot be used by a driver for auto-closing
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gates/muxes, i.e. something that closes automatically after a given
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number (one, in most cases) of I2C transfers. Unrelated I2C transfers
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may creep in and close prematurely.
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[ML4]
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If any non-I2C operation in the mux driver changes the I2C mux state,
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the driver has to lock the root adapter during that operation.
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Otherwise garbage may appear on the bus as seen from devices
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behind the mux, when an unrelated I2C transfer is in flight during
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the non-I2C mux-changing operation.
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Parent-locked muxes
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-------------------
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@ -161,28 +129,10 @@ Parent-locked muxes lock the parent adapter during the full select-
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transfer-deselect transaction. The implication is that the mux driver
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has to ensure that any and all I2C transfers through that parent
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adapter during the transaction are unlocked I2C transfers (using e.g.
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__i2c_transfer), or a deadlock will follow. There are a couple of
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caveats.
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==== ====================================================================
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PL1. If you build a topology with a parent-locked mux being the child
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of another mux, this might break a possible assumption from the
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child mux that the root adapter is unused between its select op
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and the actual transfer (e.g. if the child mux is auto-closing
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and the parent mux issues I2C transfers as part of its select).
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This is especially the case if the parent mux is mux-locked, but
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it may also happen if the parent mux is parent-locked.
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PL2. If select/deselect calls out to other subsystems such as gpio,
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pinctrl, regmap or iio, it is essential that any I2C transfers
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caused by these subsystems are unlocked. This can be convoluted to
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accomplish, maybe even impossible if an acceptably clean solution
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is sought.
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==== ====================================================================
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__i2c_transfer), or a deadlock will follow.
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Parent-locked Example
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---------------------
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~~~~~~~~~~~~~~~~~~~~~
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::
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@ -212,10 +162,30 @@ When there is an access to D1, this happens:
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9. M1 unlocks its parent adapter.
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10. M1 unlocks muxes on its parent.
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This means that accesses to both D2 and D3 are locked out for the full
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duration of the entire operation.
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Parent-locked Caveats
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~~~~~~~~~~~~~~~~~~~~~
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When using a parent-locked mux, be aware of the following restrictions:
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[PL1]
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If you build a topology with a parent-locked mux being the child
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of another mux, this might break a possible assumption from the
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child mux that the root adapter is unused between its select op
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and the actual transfer (e.g. if the child mux is auto-closing
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and the parent mux issues I2C transfers as part of its select).
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This is especially the case if the parent mux is mux-locked, but
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it may also happen if the parent mux is parent-locked.
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[PL2]
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If select/deselect calls out to other subsystems such as gpio,
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pinctrl, regmap or iio, it is essential that any I2C transfers
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caused by these subsystems are unlocked. This can be convoluted to
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accomplish, maybe even impossible if an acceptably clean solution
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is sought.
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Complex Examples
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================
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@ -261,8 +231,10 @@ This is a good topology::
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When device D1 is accessed, accesses to D2 are locked out for the
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full duration of the operation (muxes on the top child adapter of M1
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are locked). But accesses to D3 and D4 are possibly interleaved at
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any point. Accesses to D3 locks out D1 and D2, but accesses to D4
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are still possibly interleaved.
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any point.
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Accesses to D3 locks out D1 and D2, but accesses to D4 are still possibly
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interleaved.
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Mux-locked mux as parent of parent-locked mux
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@ -394,3 +366,47 @@ This is a good topology::
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When D1 or D2 are accessed, accesses to D3 and D4 are locked out while
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accesses to D5 may interleave. When D3 or D4 are accessed, accesses to
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all other devices are locked out.
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Mux type of existing device drivers
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===================================
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Whether a device is mux-locked or parent-locked depends on its
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implementation. The following list was correct at the time of writing:
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In drivers/i2c/muxes/:
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====================== =============================================
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i2c-arb-gpio-challenge Parent-locked
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i2c-mux-gpio Normally parent-locked, mux-locked iff
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all involved gpio pins are controlled by the
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same I2C root adapter that they mux.
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i2c-mux-gpmux Normally parent-locked, mux-locked iff
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specified in device-tree.
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i2c-mux-ltc4306 Mux-locked
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i2c-mux-mlxcpld Parent-locked
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i2c-mux-pca9541 Parent-locked
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i2c-mux-pca954x Parent-locked
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i2c-mux-pinctrl Normally parent-locked, mux-locked iff
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all involved pinctrl devices are controlled
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by the same I2C root adapter that they mux.
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i2c-mux-reg Parent-locked
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====================== =============================================
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In drivers/iio/:
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====================== =============================================
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gyro/mpu3050 Mux-locked
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imu/inv_mpu6050/ Mux-locked
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====================== =============================================
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In drivers/media/:
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======================= =============================================
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dvb-frontends/lgdt3306a Mux-locked
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dvb-frontends/m88ds3103 Parent-locked
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dvb-frontends/rtl2830 Parent-locked
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dvb-frontends/rtl2832 Mux-locked
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dvb-frontends/si2168 Mux-locked
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usb/cx231xx/ Parent-locked
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======================= =============================================
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