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arm: dts: socfpga: remove "clk-phase" in sdmmc_clk 

Now that the SDMMC driver can use the "clk-phase-sd-hs" binding, we don't
need the clk-phase in the sdmmc_clk anymore.

Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
This commit is contained in:
Dinh Nguyen 2022-10-04 12:53:28 -05:00
parent 2dbf5494ce
commit 63fb606a59
2 changed files with 0 additions and 2 deletions
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1
arch/arm/boot/dts/socfpga.dtsi
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@ -453,7 +453,6 @@
compatible = "altr,socfpga-gate-clk";
clocks = <&f2s_periph_ref_clk>, <&main_nand_sdmmc_clk>, <&per_nand_mmc_clk>;
clk-gate = <0xa0 8>;
clk-phase = <0 135>;
};
sdmmc_clk_divided: sdmmc_clk_divided {

1
arch/arm/boot/dts/socfpga_arria10.dtsi
View File

@ -365,7 +365,6 @@
compatible = "altr,socfpga-a10-gate-clk";
clocks = <&sdmmc_free_clk>;
clk-gate = <0xC8 5>;
clk-phase = <0 135>;
};
qspi_clk: qspi_clk {