x86/fpu: Move context switch and exit to user inlines into sched.h
internal.h is a kitchen sink which needs to get out of the way to prepare for the upcoming changes. Move the context switch and exit to user inlines into a separate header, which is all that code needs. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lkml.kernel.org/r/20211015011539.349132461@linutronix.de
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@ -27,16 +27,11 @@
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* High level FPU state handling functions:
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*/
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extern bool fpu__restore_sig(void __user *buf, int ia32_frame);
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extern void fpu__drop(struct fpu *fpu);
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extern void fpu__clear_user_states(struct fpu *fpu);
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extern int fpu__exception_code(struct fpu *fpu, int trap_nr);
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extern void fpu_sync_fpstate(struct fpu *fpu);
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/* Clone and exit operations */
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extern int fpu_clone(struct task_struct *dst);
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extern void fpu_flush_thread(void);
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/*
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* Boot time FPU initialization functions:
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*/
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@ -82,7 +77,6 @@ extern void fpstate_init_soft(struct swregs_state *soft);
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#else
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static inline void fpstate_init_soft(struct swregs_state *soft) {}
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#endif
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extern void save_fpregs_to_fpstate(struct fpu *fpu);
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/*
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* Returns 0 on success or the trap number when the operation raises an
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@ -464,58 +458,4 @@ static inline void fpregs_restore_userregs(void)
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clear_thread_flag(TIF_NEED_FPU_LOAD);
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}
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/*
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* FPU state switching for scheduling.
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*
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* This is a two-stage process:
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*
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* - switch_fpu_prepare() saves the old state.
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* This is done within the context of the old process.
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*
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* - switch_fpu_finish() sets TIF_NEED_FPU_LOAD; the floating point state
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* will get loaded on return to userspace, or when the kernel needs it.
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*
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* If TIF_NEED_FPU_LOAD is cleared then the CPU's FPU registers
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* are saved in the current thread's FPU register state.
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*
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* If TIF_NEED_FPU_LOAD is set then CPU's FPU registers may not
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* hold current()'s FPU registers. It is required to load the
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* registers before returning to userland or using the content
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* otherwise.
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*
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* The FPU context is only stored/restored for a user task and
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* PF_KTHREAD is used to distinguish between kernel and user threads.
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*/
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static inline void switch_fpu_prepare(struct fpu *old_fpu, int cpu)
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{
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if (static_cpu_has(X86_FEATURE_FPU) && !(current->flags & PF_KTHREAD)) {
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save_fpregs_to_fpstate(old_fpu);
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/*
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* The save operation preserved register state, so the
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* fpu_fpregs_owner_ctx is still @old_fpu. Store the
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* current CPU number in @old_fpu, so the next return
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* to user space can avoid the FPU register restore
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* when is returns on the same CPU and still owns the
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* context.
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*/
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old_fpu->last_cpu = cpu;
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trace_x86_fpu_regs_deactivated(old_fpu);
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}
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}
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/*
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* Misc helper functions:
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*/
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/*
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* Delay loading of the complete FPU state until the return to userland.
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* PKRU is handled separately.
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*/
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static inline void switch_fpu_finish(void)
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{
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if (cpu_feature_enabled(X86_FEATURE_FPU))
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set_thread_flag(TIF_NEED_FPU_LOAD);
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}
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#endif /* _ASM_X86_FPU_INTERNAL_H */
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@ -0,0 +1,68 @@
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/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef _ASM_X86_FPU_SCHED_H
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#define _ASM_X86_FPU_SCHED_H
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#include <linux/sched.h>
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#include <asm/cpufeature.h>
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#include <asm/fpu/types.h>
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#include <asm/trace/fpu.h>
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extern void save_fpregs_to_fpstate(struct fpu *fpu);
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extern void fpu__drop(struct fpu *fpu);
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extern int fpu_clone(struct task_struct *dst);
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extern void fpu_flush_thread(void);
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/*
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* FPU state switching for scheduling.
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*
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* This is a two-stage process:
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*
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* - switch_fpu_prepare() saves the old state.
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* This is done within the context of the old process.
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*
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* - switch_fpu_finish() sets TIF_NEED_FPU_LOAD; the floating point state
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* will get loaded on return to userspace, or when the kernel needs it.
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*
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* If TIF_NEED_FPU_LOAD is cleared then the CPU's FPU registers
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* are saved in the current thread's FPU register state.
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*
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* If TIF_NEED_FPU_LOAD is set then CPU's FPU registers may not
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* hold current()'s FPU registers. It is required to load the
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* registers before returning to userland or using the content
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* otherwise.
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*
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* The FPU context is only stored/restored for a user task and
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* PF_KTHREAD is used to distinguish between kernel and user threads.
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*/
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static inline void switch_fpu_prepare(struct fpu *old_fpu, int cpu)
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{
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if (cpu_feature_enabled(X86_FEATURE_FPU) &&
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!(current->flags & PF_KTHREAD)) {
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save_fpregs_to_fpstate(old_fpu);
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/*
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* The save operation preserved register state, so the
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* fpu_fpregs_owner_ctx is still @old_fpu. Store the
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* current CPU number in @old_fpu, so the next return
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* to user space can avoid the FPU register restore
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* when is returns on the same CPU and still owns the
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* context.
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*/
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old_fpu->last_cpu = cpu;
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trace_x86_fpu_regs_deactivated(old_fpu);
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}
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}
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/*
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* Delay loading of the complete FPU state until the return to userland.
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* PKRU is handled separately.
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*/
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static inline void switch_fpu_finish(void)
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{
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if (cpu_feature_enabled(X86_FEATURE_FPU))
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set_thread_flag(TIF_NEED_FPU_LOAD);
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}
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#endif /* _ASM_X86_FPU_SCHED_H */
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@ -8,6 +8,7 @@
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*/
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#include <asm/fpu/internal.h>
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#include <asm/fpu/regset.h>
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#include <asm/fpu/sched.h>
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#include <asm/fpu/signal.h>
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#include <asm/fpu/types.h>
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#include <asm/traps.h>
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@ -30,7 +30,7 @@
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#include <asm/apic.h>
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#include <linux/uaccess.h>
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#include <asm/mwait.h>
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#include <asm/fpu/internal.h>
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#include <asm/fpu/sched.h>
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#include <asm/debugreg.h>
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#include <asm/nmi.h>
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#include <asm/tlbflush.h>
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@ -41,7 +41,7 @@
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#include <asm/ldt.h>
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#include <asm/processor.h>
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#include <asm/fpu/internal.h>
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#include <asm/fpu/sched.h>
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#include <asm/desc.h>
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#include <linux/err.h>
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@ -42,7 +42,7 @@
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#include <asm/processor.h>
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#include <asm/pkru.h>
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#include <asm/fpu/internal.h>
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#include <asm/fpu/sched.h>
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#include <asm/mmu_context.h>
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#include <asm/prctl.h>
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#include <asm/desc.h>
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