ARM: imx: dynamically register spi_imx devices (imx25)
Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
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642e466bf4
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63ddc5b016
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@ -18,3 +18,10 @@
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#define imx25_add_mxc_nand(pdata) \
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imx_add_mxc_nand_v21(MX25_NFC_BASE_ADDR, MX25_INT_NANDFC, pdata)
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#define imx25_add_spi_imx0(pdata) \
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imx_add_spi_imx(0, MX25_CSPI1_BASE_ADDR, SZ_16K, MX25_INT_CSPI1, pdata)
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#define imx25_add_spi_imx1(pdata) \
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imx_add_spi_imx(1, MX25_CSPI2_BASE_ADDR, SZ_16K, MX25_INT_CSPI2, pdata)
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#define imx25_add_spi_imx2(pdata) \
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imx_add_spi_imx(2, MX25_CSPI3_BASE_ADDR, SZ_16K, MX25_INT_CSPI3, pdata)
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@ -181,63 +181,6 @@ struct platform_device mxc_usbh2 = {
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.num_resources = ARRAY_SIZE(mxc_usbh2_resources),
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};
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static struct resource mxc_spi_resources0[] = {
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{
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.start = 0x43fa4000,
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.end = 0x43fa7fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 14,
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.end = 14,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_spi_device0 = {
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.name = "spi_imx",
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.id = 0,
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.num_resources = ARRAY_SIZE(mxc_spi_resources0),
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.resource = mxc_spi_resources0,
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};
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static struct resource mxc_spi_resources1[] = {
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{
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.start = 0x50010000,
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.end = 0x50013fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 13,
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.end = 13,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_spi_device1 = {
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.name = "spi_imx",
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.id = 1,
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.num_resources = ARRAY_SIZE(mxc_spi_resources1),
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.resource = mxc_spi_resources1,
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};
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static struct resource mxc_spi_resources2[] = {
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{
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.start = 0x50004000,
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.end = 0x50007fff,
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.flags = IORESOURCE_MEM,
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}, {
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.start = 0,
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.end = 0,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_spi_device2 = {
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.name = "spi_imx",
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.id = 2,
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.num_resources = ARRAY_SIZE(mxc_spi_resources2),
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.resource = mxc_spi_resources2,
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};
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static struct resource mxc_pwm_resources0[] = {
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{
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.start = 0x53fe0000,
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@ -6,9 +6,6 @@ extern struct platform_device mxc_uart_device4;
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extern struct platform_device mxc_otg;
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extern struct platform_device otg_udc_device;
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extern struct platform_device mxc_usbh2;
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extern struct platform_device mxc_spi_device0;
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extern struct platform_device mxc_spi_device1;
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extern struct platform_device mxc_spi_device2;
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extern struct platform_device mxc_pwm_device0;
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extern struct platform_device mxc_pwm_device1;
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extern struct platform_device mxc_pwm_device2;
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@ -14,6 +14,7 @@
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#define MX25_I2C1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x80000)
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#define MX25_I2C3_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x84000)
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#define MX25_I2C2_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0x98000)
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#define MX25_CSPI1_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xa4000)
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#define MX25_IOMUXC_BASE_ADDR (MX25_AIPS1_BASE_ADDR + 0xac000)
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#define MX25_CRM_BASE_ADDR (MX25_AIPS2_BASE_ADDR + 0x80000)
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@ -33,18 +34,23 @@
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#define MX25_UART1_BASE_ADDR 0x43f90000
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#define MX25_UART2_BASE_ADDR 0x43f94000
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#define MX25_CSPI3_BASE_ADDR 0x50004000
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#define MX25_CSPI2_BASE_ADDR 0x50010000
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#define MX25_FEC_BASE_ADDR 0x50038000
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#define MX25_NFC_BASE_ADDR 0xbb000000
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#define MX25_DRYICE_BASE_ADDR 0x53ffc000
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#define MX25_LCDC_BASE_ADDR 0x53fbc000
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#define MX25_INT_CSPI3 0
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#define MX25_INT_I2C1 3
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#define MX25_INT_I2C2 4
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#define MX25_INT_I2C3 10
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#define MX25_INT_CSPI2 13
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#define MX25_INT_CSPI1 14
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#define MX25_INT_DRYICE 25
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#define MX25_INT_FEC 57
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#define MX25_INT_NANDFC 33
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#define MX25_INT_LCDC 39
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#define MX25_INT_FEC 57
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#if defined(IMX_NEEDS_DEPRECATED_SYMBOLS)
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#define UART1_BASE_ADDR MX25_UART1_BASE_ADDR
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