ASoC: ad1836: use soc-cache framework for codec registers access
Signed-off-by: Barry Song <Barry.Song@analog.com> Acked-by: Liam Girdwood <lrg@slimlogic.co.uk> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
This commit is contained in:
Barry Song
Mark Brown
parent
e473b84742
commit
63b62ab0d5
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@ -171,58 +171,6 @@ static int ad1836_hw_params(struct snd_pcm_substream *substream,
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return 0;
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}
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/*
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* interface to read/write ad1836 register
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*/
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#define AD1836_SPI_REG_SHFT 12
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#define AD1836_SPI_READ (1 << 11)
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#define AD1836_SPI_VAL_MSK 0x3FF
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/*
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* write to the ad1836 register space
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*/
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static int ad1836_write_reg(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u16 *reg_cache = codec->reg_cache;
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int ret = 0;
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if (value != reg_cache[reg]) {
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unsigned short buf;
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struct spi_transfer t = {
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.tx_buf = &buf,
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.len = 2,
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};
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struct spi_message m;
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buf = (reg << AD1836_SPI_REG_SHFT) |
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(value & AD1836_SPI_VAL_MSK);
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spi_message_init(&m);
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spi_message_add_tail(&t, &m);
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ret = spi_sync(codec->control_data, &m);
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if (ret == 0)
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reg_cache[reg] = value;
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}
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return ret;
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}
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/*
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* read from the ad1836 register space cache
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*/
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static unsigned int ad1836_read_reg_cache(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *reg_cache = codec->reg_cache;
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if (reg >= codec->reg_cache_size)
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return -EINVAL;
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return reg_cache[reg];
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}
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#ifdef CONFIG_PM
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static int ad1836_soc_suspend(struct platform_device *pdev,
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pm_message_t state)
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@ -231,10 +179,10 @@ static int ad1836_soc_suspend(struct platform_device *pdev,
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struct snd_soc_codec *codec = socdev->card->codec;
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/* reset clock control mode */
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u16 adc_ctrl2 = codec->read(codec, AD1836_ADC_CTRL2);
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u16 adc_ctrl2 = snd_soc_read(codec, AD1836_ADC_CTRL2);
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adc_ctrl2 &= ~AD1836_ADC_SERFMT_MASK;
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return codec->write(codec, AD1836_ADC_CTRL2, adc_ctrl2);
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return snd_soc_write(codec, AD1836_ADC_CTRL2, adc_ctrl2);
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}
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static int ad1836_soc_resume(struct platform_device *pdev)
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@ -243,10 +191,10 @@ static int ad1836_soc_resume(struct platform_device *pdev)
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struct snd_soc_codec *codec = socdev->card->codec;
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/* restore clock control mode */
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u16 adc_ctrl2 = codec->read(codec, AD1836_ADC_CTRL2);
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u16 adc_ctrl2 = snd_soc_read(codec, AD1836_ADC_CTRL2);
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adc_ctrl2 |= AD1836_ADC_AUX;
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return codec->write(codec, AD1836_ADC_CTRL2, adc_ctrl2);
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return snd_soc_write(codec, AD1836_ADC_CTRL2, adc_ctrl2);
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}
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#else
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#define ad1836_soc_suspend NULL
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@ -336,32 +284,38 @@ static int ad1836_register(struct ad1836_priv *ad1836)
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codec->owner = THIS_MODULE;
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codec->dai = &ad1836_dai;
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codec->num_dai = 1;
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codec->write = ad1836_write_reg;
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codec->read = ad1836_read_reg_cache;
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INIT_LIST_HEAD(&codec->dapm_widgets);
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INIT_LIST_HEAD(&codec->dapm_paths);
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ad1836_dai.dev = codec->dev;
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ad1836_codec = codec;
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ret = snd_soc_codec_set_cache_io(codec, 4, 12, SND_SOC_SPI);
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if (ret < 0) {
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dev_err(codec->dev, "failed to set cache I/O: %d\n",
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ret);
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kfree(ad1836);
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return ret;
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}
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/* default setting for ad1836 */
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/* de-emphasis: 48kHz, power-on dac */
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codec->write(codec, AD1836_DAC_CTRL1, 0x300);
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snd_soc_write(codec, AD1836_DAC_CTRL1, 0x300);
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/* unmute dac channels */
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codec->write(codec, AD1836_DAC_CTRL2, 0x0);
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snd_soc_write(codec, AD1836_DAC_CTRL2, 0x0);
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/* high-pass filter enable, power-on adc */
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codec->write(codec, AD1836_ADC_CTRL1, 0x100);
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snd_soc_write(codec, AD1836_ADC_CTRL1, 0x100);
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/* unmute adc channles, adc aux mode */
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codec->write(codec, AD1836_ADC_CTRL2, 0x180);
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snd_soc_write(codec, AD1836_ADC_CTRL2, 0x180);
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/* left/right diff:PGA/MUX */
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codec->write(codec, AD1836_ADC_CTRL3, 0x3A);
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snd_soc_write(codec, AD1836_ADC_CTRL3, 0x3A);
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/* volume */
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codec->write(codec, AD1836_DAC_L1_VOL, 0x3FF);
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codec->write(codec, AD1836_DAC_R1_VOL, 0x3FF);
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codec->write(codec, AD1836_DAC_L2_VOL, 0x3FF);
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codec->write(codec, AD1836_DAC_R2_VOL, 0x3FF);
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codec->write(codec, AD1836_DAC_L3_VOL, 0x3FF);
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codec->write(codec, AD1836_DAC_R3_VOL, 0x3FF);
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snd_soc_write(codec, AD1836_DAC_L1_VOL, 0x3FF);
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snd_soc_write(codec, AD1836_DAC_R1_VOL, 0x3FF);
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snd_soc_write(codec, AD1836_DAC_L2_VOL, 0x3FF);
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snd_soc_write(codec, AD1836_DAC_R2_VOL, 0x3FF);
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snd_soc_write(codec, AD1836_DAC_L3_VOL, 0x3FF);
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snd_soc_write(codec, AD1836_DAC_R3_VOL, 0x3FF);
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ret = snd_soc_register_codec(codec);
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if (ret != 0) {
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@ -15,6 +15,68 @@
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#include <linux/spi/spi.h>
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#include <sound/soc.h>
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static unsigned int snd_soc_4_12_read(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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u16 *cache = codec->reg_cache;
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if (reg >= codec->reg_cache_size)
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return -1;
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return cache[reg];
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}
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static int snd_soc_4_12_write(struct snd_soc_codec *codec, unsigned int reg,
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unsigned int value)
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{
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u16 *cache = codec->reg_cache;
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u8 data[2];
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int ret;
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BUG_ON(codec->volatile_register);
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data[0] = (reg << 4) | ((value >> 8) & 0x000f);
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data[1] = value & 0x00ff;
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if (reg < codec->reg_cache_size)
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cache[reg] = value;
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ret = codec->hw_write(codec->control_data, data, 2);
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if (ret == 2)
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return 0;
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if (ret < 0)
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return ret;
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else
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return -EIO;
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}
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#if defined(CONFIG_SPI_MASTER)
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static int snd_soc_4_12_spi_write(void *control_data, const char *data,
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int len)
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{
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struct spi_device *spi = control_data;
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struct spi_transfer t;
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struct spi_message m;
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u8 msg[2];
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if (len <= 0)
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return 0;
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msg[0] = data[1];
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msg[1] = data[0];
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spi_message_init(&m);
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memset(&t, 0, (sizeof t));
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t.tx_buf = &msg[0];
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t.len = len;
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spi_message_add_tail(&t, &m);
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spi_sync(spi, &m);
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return len;
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}
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#else
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#define snd_soc_4_12_spi_write NULL
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#endif
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static unsigned int snd_soc_7_9_read(struct snd_soc_codec *codec,
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unsigned int reg)
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{
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@ -179,6 +241,11 @@ static struct {
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unsigned int (*read)(struct snd_soc_codec *, unsigned int);
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unsigned int (*i2c_read)(struct snd_soc_codec *, unsigned int);
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} io_types[] = {
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{
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.addr_bits = 4, .data_bits = 12,
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.write = snd_soc_4_12_write, .read = snd_soc_4_12_read,
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.spi_write = snd_soc_4_12_spi_write,
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},
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{
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.addr_bits = 7, .data_bits = 9,
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.write = snd_soc_7_9_write, .read = snd_soc_7_9_read,
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