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MSI: Blacklist PCI-E chipsets depending on Hypertransport MSI capability 

Introduce msi_ht_cap_enabled() to check the MSI capability in the
Hypertransport configuration space.
It is used in a generic quirk quirk_msi_ht_cap() to check whether
MSI is enabled on hypertransport chipset, and a nVidia specific quirk
quirk_nvidia_ck804_msi_ht_cap() where two 2 HT MSI mappings have to
be checked.
Both quirks set the PCI_BUS_FLAGS_NO_MSI bus flag when MSI is disabled.

Signed-off-by: Brice Goglin <brice@myri.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
This commit is contained in:
Brice Goglin 2006-08-31 01:55:32 -04:00 committed by Greg Kroah-Hartman
parent 46ff34633e
commit 6397c75cbc
2 changed files with 60 additions and 0 deletions
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59
drivers/pci/quirks.c
View File

@ -1703,6 +1703,65 @@ static void __devinit quirk_disable_msi(struct pci_dev *dev)
} }
} }
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi); DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_AMD, PCI_DEVICE_ID_AMD_8131_BRIDGE, quirk_disable_msi);
/* Go through the list of Hypertransport capabilities and
* return 1 if a HT MSI capability is found and enabled */
static int __devinit msi_ht_cap_enabled(struct pci_dev *dev)
{
u8 pos;
int ttl;
for (pos = pci_find_capability(dev, PCI_CAP_ID_HT), ttl = 48;
pos && ttl;
pos = pci_find_next_capability(dev, pos, PCI_CAP_ID_HT), ttl--) {
u32 cap_hdr;
/* MSI mapping section according to Hypertransport spec */
if (pci_read_config_dword(dev, pos, &cap_hdr) == 0
&& (cap_hdr & 0xf8000000) == 0xa8000000 /* MSI mapping */) {
printk(KERN_INFO "PCI: Found HT MSI mapping on %s with capability %s\n",
pci_name(dev), cap_hdr & 0x10000 ? "enabled" : "disabled");
return (cap_hdr & 0x10000) != 0; /* MSI mapping cap enabled */
}
}
return 0;
}
/* Check the hypertransport MSI mapping to know whether MSI is enabled or not */
static void __devinit quirk_msi_ht_cap(struct pci_dev *dev)
{
if (dev->subordinate && !msi_ht_cap_enabled(dev)) {
printk(KERN_WARNING "PCI: MSI quirk detected. "
"MSI disabled on chipset %s.\n",
pci_name(dev));
dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
}
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_SERVERWORKS, PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE,
quirk_msi_ht_cap);
/* The nVidia CK804 chipset may have 2 HT MSI mappings.
* MSI are supported if the MSI capability set in any of these mappings.
*/
static void __devinit quirk_nvidia_ck804_msi_ht_cap(struct pci_dev *dev)
{
struct pci_dev *pdev;
if (!dev->subordinate)
return;
/* check HT MSI cap on this chipset and the root one.
* a single one having MSI is enough to be sure that MSI are supported.
*/
pdev = pci_find_slot(dev->bus->number, 0);
if (dev->subordinate && !msi_ht_cap_enabled(dev)
&& !msi_ht_cap_enabled(pdev)) {
printk(KERN_WARNING "PCI: MSI quirk detected. "
"MSI disabled on chipset %s.\n",
pci_name(dev));
dev->subordinate->bus_flags |= PCI_BUS_FLAGS_NO_MSI;
}
}
DECLARE_PCI_FIXUP_FINAL(PCI_VENDOR_ID_NVIDIA, PCI_DEVICE_ID_NVIDIA_CK804_PCIE,
quirk_nvidia_ck804_msi_ht_cap);
#endif /* CONFIG_PCI_MSI */ #endif /* CONFIG_PCI_MSI */
EXPORT_SYMBOL(pcie_mch_quirk); EXPORT_SYMBOL(pcie_mch_quirk);

1
include/linux/pci_ids.h
View File

@ -1411,6 +1411,7 @@
#define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009 #define PCI_DEVICE_ID_SERVERWORKS_LE 0x0009
#define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017 #define PCI_DEVICE_ID_SERVERWORKS_GCNB_LE 0x0017
#define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103 #define PCI_DEVICE_ID_SERVERWORKS_EPB 0x0103
#define PCI_DEVICE_ID_SERVERWORKS_HT2000_PCIE 0x0132
#define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200 #define PCI_DEVICE_ID_SERVERWORKS_OSB4 0x0200
#define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201 #define PCI_DEVICE_ID_SERVERWORKS_CSB5 0x0201
#define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203 #define PCI_DEVICE_ID_SERVERWORKS_CSB6 0x0203