ARM: imx53_loco: add all pad configure.
Signed-off-by: Richard Zhao <richard.zhao@freescale.com> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
This commit is contained in:
Richard Zhao
Sascha Hauer
parent
daa7954ccd
commit
6388b96e84
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@ -39,8 +39,145 @@
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#define LOCO_FEC_PHY_RST IMX_GPIO_NR(7, 6)
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static iomux_v3_cfg_t mx53_loco_pads[] = {
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/* FEC */
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MX53_PAD_FEC_MDC__FEC_MDC,
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MX53_PAD_FEC_MDIO__FEC_MDIO,
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MX53_PAD_FEC_REF_CLK__FEC_TX_CLK,
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MX53_PAD_FEC_RX_ER__FEC_RX_ER,
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MX53_PAD_FEC_CRS_DV__FEC_RX_DV,
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MX53_PAD_FEC_RXD1__FEC_RDATA_1,
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MX53_PAD_FEC_RXD0__FEC_RDATA_0,
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MX53_PAD_FEC_TX_EN__FEC_TX_EN,
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MX53_PAD_FEC_TXD1__FEC_TDATA_1,
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MX53_PAD_FEC_TXD0__FEC_TDATA_0,
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/* FEC_nRST */
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MX53_PAD_PATA_DA_0__GPIO7_6,
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/* FEC_nINT */
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MX53_PAD_PATA_DATA4__GPIO2_4,
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/* AUDMUX5 */
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MX53_PAD_KEY_COL0__AUDMUX_AUD5_TXC,
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MX53_PAD_KEY_ROW0__AUDMUX_AUD5_TXD,
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MX53_PAD_KEY_COL1__AUDMUX_AUD5_TXFS,
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MX53_PAD_KEY_ROW1__AUDMUX_AUD5_RXD,
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/* I2C2 */
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MX53_PAD_KEY_COL3__I2C2_SCL,
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MX53_PAD_KEY_ROW3__I2C2_SDA,
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/* SD1 */
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MX53_PAD_SD1_CMD__ESDHC1_CMD,
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MX53_PAD_SD1_CLK__ESDHC1_CLK,
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MX53_PAD_SD1_DATA0__ESDHC1_DAT0,
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MX53_PAD_SD1_DATA1__ESDHC1_DAT1,
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MX53_PAD_SD1_DATA2__ESDHC1_DAT2,
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MX53_PAD_SD1_DATA3__ESDHC1_DAT3,
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/* SD3 */
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MX53_PAD_PATA_DATA8__ESDHC3_DAT0,
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MX53_PAD_PATA_DATA9__ESDHC3_DAT1,
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MX53_PAD_PATA_DATA10__ESDHC3_DAT2,
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MX53_PAD_PATA_DATA11__ESDHC3_DAT3,
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MX53_PAD_PATA_DATA0__ESDHC3_DAT4,
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MX53_PAD_PATA_DATA1__ESDHC3_DAT5,
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MX53_PAD_PATA_DATA2__ESDHC3_DAT6,
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MX53_PAD_PATA_DATA3__ESDHC3_DAT7,
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MX53_PAD_PATA_IORDY__ESDHC3_CLK,
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MX53_PAD_PATA_RESET_B__ESDHC3_CMD,
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/* SD3_CD */
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MX53_PAD_EIM_DA11__GPIO3_11,
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/* SD3_WP */
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MX53_PAD_EIM_DA12__GPIO3_12,
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/* VGA */
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MX53_PAD_EIM_OE__IPU_DI1_PIN7,
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MX53_PAD_EIM_RW__IPU_DI1_PIN8,
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/* DISPLB */
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MX53_PAD_EIM_D20__IPU_SER_DISP0_CS,
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MX53_PAD_EIM_D21__IPU_DISPB0_SER_CLK,
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MX53_PAD_EIM_D22__IPU_DISPB0_SER_DIN,
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MX53_PAD_EIM_D23__IPU_DI0_D0_CS,
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/* DISP0_POWER_EN */
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MX53_PAD_EIM_D24__GPIO3_24,
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/* DISP0 DET INT */
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MX53_PAD_EIM_D31__GPIO3_31,
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/* LVDS */
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MX53_PAD_LVDS0_TX3_P__LDB_LVDS0_TX3,
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MX53_PAD_LVDS0_CLK_P__LDB_LVDS0_CLK,
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MX53_PAD_LVDS0_TX2_P__LDB_LVDS0_TX2,
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MX53_PAD_LVDS0_TX1_P__LDB_LVDS0_TX1,
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MX53_PAD_LVDS0_TX0_P__LDB_LVDS0_TX0,
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MX53_PAD_LVDS1_TX3_P__LDB_LVDS1_TX3,
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MX53_PAD_LVDS1_TX2_P__LDB_LVDS1_TX2,
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MX53_PAD_LVDS1_CLK_P__LDB_LVDS1_CLK,
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MX53_PAD_LVDS1_TX1_P__LDB_LVDS1_TX1,
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MX53_PAD_LVDS1_TX0_P__LDB_LVDS1_TX0,
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/* I2C1 */
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MX53_PAD_CSI0_DAT8__I2C1_SDA,
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MX53_PAD_CSI0_DAT9__I2C1_SCL,
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/* UART1 */
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MX53_PAD_CSI0_DAT10__UART1_TXD_MUX,
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MX53_PAD_CSI0_DAT11__UART1_RXD_MUX,
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/* CSI0 */
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MX53_PAD_CSI0_DAT12__IPU_CSI0_D_12,
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MX53_PAD_CSI0_DAT13__IPU_CSI0_D_13,
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MX53_PAD_CSI0_DAT14__IPU_CSI0_D_14,
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MX53_PAD_CSI0_DAT15__IPU_CSI0_D_15,
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MX53_PAD_CSI0_DAT16__IPU_CSI0_D_16,
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MX53_PAD_CSI0_DAT17__IPU_CSI0_D_17,
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MX53_PAD_CSI0_DAT18__IPU_CSI0_D_18,
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MX53_PAD_CSI0_DAT19__IPU_CSI0_D_19,
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MX53_PAD_CSI0_VSYNC__IPU_CSI0_VSYNC,
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MX53_PAD_CSI0_MCLK__IPU_CSI0_HSYNC,
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MX53_PAD_CSI0_PIXCLK__IPU_CSI0_PIXCLK,
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/* DISPLAY */
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MX53_PAD_DI0_DISP_CLK__IPU_DI0_DISP_CLK,
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MX53_PAD_DI0_PIN15__IPU_DI0_PIN15,
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MX53_PAD_DI0_PIN2__IPU_DI0_PIN2,
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MX53_PAD_DI0_PIN3__IPU_DI0_PIN3,
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MX53_PAD_DISP0_DAT0__IPU_DISP0_DAT_0,
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MX53_PAD_DISP0_DAT1__IPU_DISP0_DAT_1,
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MX53_PAD_DISP0_DAT2__IPU_DISP0_DAT_2,
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MX53_PAD_DISP0_DAT3__IPU_DISP0_DAT_3,
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MX53_PAD_DISP0_DAT4__IPU_DISP0_DAT_4,
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MX53_PAD_DISP0_DAT5__IPU_DISP0_DAT_5,
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MX53_PAD_DISP0_DAT6__IPU_DISP0_DAT_6,
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MX53_PAD_DISP0_DAT7__IPU_DISP0_DAT_7,
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MX53_PAD_DISP0_DAT8__IPU_DISP0_DAT_8,
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MX53_PAD_DISP0_DAT9__IPU_DISP0_DAT_9,
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MX53_PAD_DISP0_DAT10__IPU_DISP0_DAT_10,
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MX53_PAD_DISP0_DAT11__IPU_DISP0_DAT_11,
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MX53_PAD_DISP0_DAT12__IPU_DISP0_DAT_12,
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MX53_PAD_DISP0_DAT13__IPU_DISP0_DAT_13,
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MX53_PAD_DISP0_DAT14__IPU_DISP0_DAT_14,
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MX53_PAD_DISP0_DAT15__IPU_DISP0_DAT_15,
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MX53_PAD_DISP0_DAT16__IPU_DISP0_DAT_16,
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MX53_PAD_DISP0_DAT17__IPU_DISP0_DAT_17,
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MX53_PAD_DISP0_DAT18__IPU_DISP0_DAT_18,
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MX53_PAD_DISP0_DAT19__IPU_DISP0_DAT_19,
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MX53_PAD_DISP0_DAT20__IPU_DISP0_DAT_20,
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MX53_PAD_DISP0_DAT21__IPU_DISP0_DAT_21,
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MX53_PAD_DISP0_DAT22__IPU_DISP0_DAT_22,
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MX53_PAD_DISP0_DAT23__IPU_DISP0_DAT_23,
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/* Audio CLK*/
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MX53_PAD_GPIO_0__CCM_SSI_EXT1_CLK,
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/* PWM */
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MX53_PAD_GPIO_1__PWM2_PWMO,
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/* SPDIF */
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MX53_PAD_GPIO_7__SPDIF_PLOCK,
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MX53_PAD_GPIO_17__SPDIF_OUT1,
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/* GPIO */
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MX53_PAD_PATA_DA_1__GPIO7_7,
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MX53_PAD_PATA_DA_2__GPIO7_8,
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MX53_PAD_PATA_DATA5__GPIO2_5,
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MX53_PAD_PATA_DATA6__GPIO2_6,
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MX53_PAD_PATA_DATA14__GPIO2_14,
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MX53_PAD_PATA_DATA15__GPIO2_15,
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MX53_PAD_PATA_INTRQ__GPIO7_2,
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MX53_PAD_EIM_WAIT__GPIO5_0,
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MX53_PAD_NANDF_WP_B__GPIO6_9,
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MX53_PAD_NANDF_RB0__GPIO6_10,
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MX53_PAD_NANDF_CS1__GPIO6_14,
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MX53_PAD_NANDF_CS2__GPIO6_15,
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MX53_PAD_NANDF_CS3__GPIO6_16,
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MX53_PAD_GPIO_5__GPIO1_5,
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MX53_PAD_GPIO_16__GPIO7_11,
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MX53_PAD_GPIO_8__GPIO1_8,
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};
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static inline void mx53_loco_fec_reset(void)
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