ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field

The field will be removed from the sh-sci driver. Don't set it and let
the driver handle baud rate calculation internally.

Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart 2013-12-06 10:59:46 +01:00 committed by Simon Horman
parent 52613951a6
commit 6319ea5089
1 changed files with 5 additions and 6 deletions

View File

@ -100,11 +100,10 @@ void __init r8a7790_pinmux_init(void)
r8a7790_register_i2c(3); r8a7790_register_i2c(3);
} }
#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \ #define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
static struct plat_sci_port scif##index##_platform_data = { \ static struct plat_sci_port scif##index##_platform_data = { \
.type = scif_type, \ .type = scif_type, \
.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \ .flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
.scbrr_algo_id = algo, \
.scscr = _scscr, \ .scscr = _scscr, \
}; \ }; \
\ \
@ -115,19 +114,19 @@ static struct resource scif##index##_resources[] = { \
#define R8A7790_SCIF(index, baseaddr, irq) \ #define R8A7790_SCIF(index, baseaddr, irq) \
__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \ __R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
SCBRR_ALGO_2, index, baseaddr, irq) index, baseaddr, irq)
#define R8A7790_SCIFA(index, baseaddr, irq) \ #define R8A7790_SCIFA(index, baseaddr, irq) \
__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \ __R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
SCBRR_ALGO_4, index, baseaddr, irq) index, baseaddr, irq)
#define R8A7790_SCIFB(index, baseaddr, irq) \ #define R8A7790_SCIFB(index, baseaddr, irq) \
__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \ __R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
SCBRR_ALGO_4, index, baseaddr, irq) index, baseaddr, irq)
#define R8A7790_HSCIF(index, baseaddr, irq) \ #define R8A7790_HSCIF(index, baseaddr, irq) \
__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \ __R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
SCBRR_ALGO_6, index, baseaddr, irq) index, baseaddr, irq)
R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */ R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */ R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */