ARM: shmobile: r8a7790: Don't set plat_sci_port scbrr_algo_id field
The field will be removed from the sh-sci driver. Don't set it and let the driver handle baud rate calculation internally. Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -100,11 +100,10 @@ void __init r8a7790_pinmux_init(void)
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r8a7790_register_i2c(3);
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r8a7790_register_i2c(3);
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}
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}
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#define __R8A7790_SCIF(scif_type, _scscr, algo, index, baseaddr, irq) \
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#define __R8A7790_SCIF(scif_type, _scscr, index, baseaddr, irq) \
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static struct plat_sci_port scif##index##_platform_data = { \
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static struct plat_sci_port scif##index##_platform_data = { \
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.type = scif_type, \
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.type = scif_type, \
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
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.flags = UPF_BOOT_AUTOCONF | UPF_IOREMAP, \
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.scbrr_algo_id = algo, \
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.scscr = _scscr, \
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.scscr = _scscr, \
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}; \
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}; \
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\
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\
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@ -115,19 +114,19 @@ static struct resource scif##index##_resources[] = { \
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#define R8A7790_SCIF(index, baseaddr, irq) \
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#define R8A7790_SCIF(index, baseaddr, irq) \
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__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
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__R8A7790_SCIF(PORT_SCIF, SCSCR_RE | SCSCR_TE, \
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SCBRR_ALGO_2, index, baseaddr, irq)
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index, baseaddr, irq)
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#define R8A7790_SCIFA(index, baseaddr, irq) \
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#define R8A7790_SCIFA(index, baseaddr, irq) \
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__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
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__R8A7790_SCIF(PORT_SCIFA, SCSCR_RE | SCSCR_TE | SCSCR_CKE0, \
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SCBRR_ALGO_4, index, baseaddr, irq)
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index, baseaddr, irq)
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#define R8A7790_SCIFB(index, baseaddr, irq) \
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#define R8A7790_SCIFB(index, baseaddr, irq) \
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__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
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__R8A7790_SCIF(PORT_SCIFB, SCSCR_RE | SCSCR_TE, \
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SCBRR_ALGO_4, index, baseaddr, irq)
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index, baseaddr, irq)
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#define R8A7790_HSCIF(index, baseaddr, irq) \
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#define R8A7790_HSCIF(index, baseaddr, irq) \
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__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
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__R8A7790_SCIF(PORT_HSCIF, SCSCR_RE | SCSCR_TE, \
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SCBRR_ALGO_6, index, baseaddr, irq)
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index, baseaddr, irq)
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R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
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R8A7790_SCIFA(0, 0xe6c40000, gic_spi(144)); /* SCIFA0 */
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R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
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R8A7790_SCIFA(1, 0xe6c50000, gic_spi(145)); /* SCIFA1 */
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