drm/i915/guc: Extract guc_init from guc_init_hw

After GPU reset, GuC HW needs to be reinitialized (with FW reload).
Unfortunately, we're doing some extra work there (mostly allocating stuff),
work that can be moved to guc_init and called once at driver load time.

As a side effect we're no longer hitting an assert in
i915_ggtt_enable_guc on suspend/resume.

v2: Do not duplicate disable_communication / reset_guc_interrupts
v3: Add proper teardown after rebase

References: 04f7b24ecc ("drm/i915/guc: Assert that we switch between known ggtt->invalidate functions")
Signed-off-by: Michał Winiarski <michal.winiarski@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Sagar Arun Kamble <sagar.a.kamble@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20171213221352.7173-3-michal.winiarski@intel.com
This commit is contained in:
Michał Winiarski 2017-12-13 23:13:48 +01:00 committed by Chris Wilson
parent 3176ff49bc
commit 61b5c1587d
4 changed files with 61 additions and 31 deletions

View File

@ -617,6 +617,7 @@ static void i915_gem_fini(struct drm_i915_private *dev_priv)
mutex_lock(&dev_priv->drm.struct_mutex); mutex_lock(&dev_priv->drm.struct_mutex);
intel_uc_fini_hw(dev_priv); intel_uc_fini_hw(dev_priv);
intel_uc_fini(dev_priv);
i915_gem_cleanup_engines(dev_priv); i915_gem_cleanup_engines(dev_priv);
i915_gem_contexts_fini(dev_priv); i915_gem_contexts_fini(dev_priv);
mutex_unlock(&dev_priv->drm.struct_mutex); mutex_unlock(&dev_priv->drm.struct_mutex);

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@ -5196,10 +5196,14 @@ int i915_gem_init(struct drm_i915_private *dev_priv)
intel_init_gt_powersave(dev_priv); intel_init_gt_powersave(dev_priv);
ret = i915_gem_init_hw(dev_priv); ret = intel_uc_init(dev_priv);
if (ret) if (ret)
goto err_pm; goto err_pm;
ret = i915_gem_init_hw(dev_priv);
if (ret)
goto err_uc_init;
/* /*
* Despite its name intel_init_clock_gating applies both display * Despite its name intel_init_clock_gating applies both display
* clock gating workarounds; GT mmio workarounds and the occasional * clock gating workarounds; GT mmio workarounds and the occasional
@ -5240,6 +5244,8 @@ err_init_hw:
i915_gem_wait_for_idle(dev_priv, I915_WAIT_LOCKED); i915_gem_wait_for_idle(dev_priv, I915_WAIT_LOCKED);
i915_gem_contexts_lost(dev_priv); i915_gem_contexts_lost(dev_priv);
intel_uc_fini_hw(dev_priv); intel_uc_fini_hw(dev_priv);
err_uc_init:
intel_uc_fini(dev_priv);
err_pm: err_pm:
if (ret != -EIO) { if (ret != -EIO) {
intel_cleanup_gt_powersave(dev_priv); intel_cleanup_gt_powersave(dev_priv);

View File

@ -214,6 +214,51 @@ void intel_uc_fini_wq(struct drm_i915_private *dev_priv)
intel_guc_fini_wq(&dev_priv->guc); intel_guc_fini_wq(&dev_priv->guc);
} }
int intel_uc_init(struct drm_i915_private *dev_priv)
{
struct intel_guc *guc = &dev_priv->guc;
int ret;
if (!USES_GUC(dev_priv))
return 0;
if (!HAS_GUC(dev_priv))
return -ENODEV;
ret = intel_guc_init(guc);
if (ret)
return ret;
if (USES_GUC_SUBMISSION(dev_priv)) {
/*
* This is stuff we need to have available at fw load time
* if we are planning to enable submission later
*/
ret = intel_guc_submission_init(guc);
if (ret) {
intel_guc_fini(guc);
return ret;
}
}
return 0;
}
void intel_uc_fini(struct drm_i915_private *dev_priv)
{
struct intel_guc *guc = &dev_priv->guc;
if (!USES_GUC(dev_priv))
return;
GEM_BUG_ON(!HAS_GUC(dev_priv));
if (USES_GUC_SUBMISSION(dev_priv))
intel_guc_submission_fini(guc);
intel_guc_fini(guc);
}
int intel_uc_init_hw(struct drm_i915_private *dev_priv) int intel_uc_init_hw(struct drm_i915_private *dev_priv)
{ {
struct intel_guc *guc = &dev_priv->guc; struct intel_guc *guc = &dev_priv->guc;
@ -223,28 +268,11 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
if (!USES_GUC(dev_priv)) if (!USES_GUC(dev_priv))
return 0; return 0;
if (!HAS_GUC(dev_priv)) { GEM_BUG_ON(!HAS_GUC(dev_priv));
ret = -ENODEV;
goto err_out;
}
guc_disable_communication(guc); guc_disable_communication(guc);
gen9_reset_guc_interrupts(dev_priv); gen9_reset_guc_interrupts(dev_priv);
ret = intel_guc_init(guc);
if (ret)
goto err_out;
if (USES_GUC_SUBMISSION(dev_priv)) {
/*
* This is stuff we need to have available at fw load time
* if we are planning to enable submission later
*/
ret = intel_guc_submission_init(guc);
if (ret)
goto err_guc;
}
/* init WOPCM */ /* init WOPCM */
I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv)); I915_WRITE(GUC_WOPCM_SIZE, intel_guc_wopcm_size(dev_priv));
I915_WRITE(DMA_GUC_WOPCM_OFFSET, I915_WRITE(DMA_GUC_WOPCM_OFFSET,
@ -264,12 +292,12 @@ int intel_uc_init_hw(struct drm_i915_private *dev_priv)
*/ */
ret = __intel_uc_reset_hw(dev_priv); ret = __intel_uc_reset_hw(dev_priv);
if (ret) if (ret)
goto err_submission; goto err_out;
if (USES_HUC(dev_priv)) { if (USES_HUC(dev_priv)) {
ret = intel_huc_init_hw(huc); ret = intel_huc_init_hw(huc);
if (ret) if (ret)
goto err_submission; goto err_out;
} }
intel_guc_init_params(guc); intel_guc_init_params(guc);
@ -322,11 +350,6 @@ err_communication:
guc_disable_communication(guc); guc_disable_communication(guc);
err_log_capture: err_log_capture:
guc_capture_load_err_log(guc); guc_capture_load_err_log(guc);
err_submission:
if (USES_GUC_SUBMISSION(dev_priv))
intel_guc_submission_fini(guc);
err_guc:
intel_guc_fini(guc);
err_out: err_out:
/* /*
* Note that there is no fallback as either user explicitly asked for * Note that there is no fallback as either user explicitly asked for
@ -348,15 +371,13 @@ void intel_uc_fini_hw(struct drm_i915_private *dev_priv)
if (!USES_GUC(dev_priv)) if (!USES_GUC(dev_priv))
return; return;
GEM_BUG_ON(!HAS_GUC(dev_priv));
if (USES_GUC_SUBMISSION(dev_priv)) if (USES_GUC_SUBMISSION(dev_priv))
intel_guc_submission_disable(guc); intel_guc_submission_disable(guc);
guc_disable_communication(guc); guc_disable_communication(guc);
if (USES_GUC_SUBMISSION(dev_priv)) { if (USES_GUC_SUBMISSION(dev_priv))
gen9_disable_guc_interrupts(dev_priv); gen9_disable_guc_interrupts(dev_priv);
intel_guc_submission_fini(guc);
}
intel_guc_fini(guc);
} }

View File

@ -37,6 +37,8 @@ int intel_uc_init_wq(struct drm_i915_private *dev_priv);
void intel_uc_fini_wq(struct drm_i915_private *dev_priv); void intel_uc_fini_wq(struct drm_i915_private *dev_priv);
int intel_uc_init_hw(struct drm_i915_private *dev_priv); int intel_uc_init_hw(struct drm_i915_private *dev_priv);
void intel_uc_fini_hw(struct drm_i915_private *dev_priv); void intel_uc_fini_hw(struct drm_i915_private *dev_priv);
int intel_uc_init(struct drm_i915_private *dev_priv);
void intel_uc_fini(struct drm_i915_private *dev_priv);
static inline bool intel_uc_is_using_guc(void) static inline bool intel_uc_is_using_guc(void)
{ {