drm/i915/gvt: change resetting to resetting_eng
Use resetting_eng to identify which engine is resetting so the rest ones' workload won't be impacted v2: - use ENGINE_MASK(ring_id) instead of (1 << ring_id). (Zhenyu) Signed-off-by: Chuanxiao Dong <chuanxiao.dong@intel.com> Cc: Zhenyu Wang <zhenyuw@linux.intel.com> Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
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@ -499,10 +499,10 @@ static void release_shadow_wa_ctx(struct intel_shadow_wa_ctx *wa_ctx)
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static int complete_execlist_workload(struct intel_vgpu_workload *workload)
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{
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struct intel_vgpu *vgpu = workload->vgpu;
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struct intel_vgpu_execlist *execlist =
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&vgpu->execlist[workload->ring_id];
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int ring_id = workload->ring_id;
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struct intel_vgpu_execlist *execlist = &vgpu->execlist[ring_id];
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struct intel_vgpu_workload *next_workload;
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struct list_head *next = workload_q_head(vgpu, workload->ring_id)->next;
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struct list_head *next = workload_q_head(vgpu, ring_id)->next;
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bool lite_restore = false;
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int ret;
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@ -512,10 +512,10 @@ static int complete_execlist_workload(struct intel_vgpu_workload *workload)
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release_shadow_batch_buffer(workload);
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release_shadow_wa_ctx(&workload->wa_ctx);
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if (workload->status || vgpu->resetting)
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if (workload->status || (vgpu->resetting_eng & ENGINE_MASK(ring_id)))
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goto out;
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if (!list_empty(workload_q_head(vgpu, workload->ring_id))) {
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if (!list_empty(workload_q_head(vgpu, ring_id))) {
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struct execlist_ctx_descriptor_format *this_desc, *next_desc;
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next_workload = container_of(next,
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@ -149,7 +149,7 @@ struct intel_vgpu {
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bool active;
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bool pv_notified;
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bool failsafe;
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bool resetting;
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unsigned int resetting_eng;
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void *sched_data;
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struct vgpu_sched_ctl sched_ctl;
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@ -432,7 +432,8 @@ static void complete_current_workload(struct intel_gvt *gvt, int ring_id)
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i915_gem_request_put(fetch_and_zero(&workload->req));
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if (!workload->status && !vgpu->resetting) {
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if (!workload->status && !(vgpu->resetting_eng &
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ENGINE_MASK(ring_id))) {
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update_guest_context(workload);
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for_each_set_bit(event, workload->pending_events,
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@ -480,11 +480,13 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
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{
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struct intel_gvt *gvt = vgpu->gvt;
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struct intel_gvt_workload_scheduler *scheduler = &gvt->scheduler;
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unsigned int resetting_eng = dmlr ? ALL_ENGINES : engine_mask;
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gvt_dbg_core("------------------------------------------\n");
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gvt_dbg_core("resseting vgpu%d, dmlr %d, engine_mask %08x\n",
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vgpu->id, dmlr, engine_mask);
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vgpu->resetting = true;
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vgpu->resetting_eng = resetting_eng;
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intel_vgpu_stop_schedule(vgpu);
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/*
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@ -497,7 +499,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
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mutex_lock(&gvt->lock);
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}
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intel_vgpu_reset_execlist(vgpu, dmlr ? ALL_ENGINES : engine_mask);
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intel_vgpu_reset_execlist(vgpu, resetting_eng);
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/* full GPU reset or device model level reset */
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if (engine_mask == ALL_ENGINES || dmlr) {
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@ -520,7 +522,7 @@ void intel_gvt_reset_vgpu_locked(struct intel_vgpu *vgpu, bool dmlr,
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}
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}
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vgpu->resetting = false;
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vgpu->resetting_eng = 0;
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gvt_dbg_core("reset vgpu%d done\n", vgpu->id);
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gvt_dbg_core("------------------------------------------\n");
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}
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