From 614dea315fceee86384f539064a30329961579b0 Mon Sep 17 00:00:00 2001 From: Alex Deucher Date: Fri, 3 Mar 2017 15:08:30 -0500 Subject: [PATCH] drm/amdgpu: update IH IV ring entry for soc-15 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Reflect the new format on soc-15 asics. Reviewed-by: Christian König Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h index 043620dfdacb..a3da1a122fc8 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ih.h @@ -93,11 +93,14 @@ struct amdgpu_ih_ring { struct amdgpu_iv_entry { unsigned client_id; unsigned src_id; - unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW]; unsigned ring_id; unsigned vm_id; unsigned vm_id_src; + uint64_t timestamp; + unsigned timestamp_src; unsigned pas_id; + unsigned pasid_src; + unsigned src_data[AMDGPU_IH_SRC_DATA_MAX_SIZE_DW]; const uint32_t *iv_entry; };