habanalabs: rename ArmCP to CPU-CP
There were a couple of comments where the name ArmCP was still used. Rename it to CPU-CP. In addition, rename ArmCP or ARM in log messages to "device CPU". Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
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975ab7b32b
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6138bbe911
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@ -175,7 +175,7 @@ int hl_fw_unmask_irq_arr(struct hl_device *hdev, const u32 *irq_arr,
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total_pkt_size = sizeof(struct cpucp_unmask_irq_arr_packet) +
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irq_arr_size;
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/* data should be aligned to 8 bytes in order to ArmCP to copy it */
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/* data should be aligned to 8 bytes in order to CPU-CP to copy it */
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total_pkt_size = (total_pkt_size + 0x7) & ~0x7;
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/* total_pkt_size is casted to u16 later on */
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@ -283,7 +283,7 @@ int hl_fw_cpucp_info_get(struct hl_device *hdev)
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&cpucp_info_dma_addr);
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if (!cpucp_info_cpu_addr) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for ArmCP info packet\n");
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"Failed to allocate DMA memory for CPU-CP info packet\n");
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return -ENOMEM;
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}
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@ -298,7 +298,7 @@ int hl_fw_cpucp_info_get(struct hl_device *hdev)
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle ArmCP info pkt, error %d\n", rc);
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"Failed to handle CPU-CP info pkt, error %d\n", rc);
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goto out;
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}
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@ -333,7 +333,7 @@ int hl_fw_get_eeprom_data(struct hl_device *hdev, void *data, size_t max_size)
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max_size, &eeprom_info_dma_addr);
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if (!eeprom_info_cpu_addr) {
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dev_err(hdev->dev,
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"Failed to allocate DMA memory for ArmCP EEPROM packet\n");
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"Failed to allocate DMA memory for CPU-CP EEPROM packet\n");
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return -ENOMEM;
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}
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@ -349,7 +349,8 @@ int hl_fw_get_eeprom_data(struct hl_device *hdev, void *data, size_t max_size)
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle ArmCP EEPROM packet, error %d\n", rc);
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"Failed to handle CPU-CP EEPROM packet, error %d\n",
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rc);
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goto out;
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}
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@ -379,7 +380,7 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle ArmCP PCI info pkt, error %d\n", rc);
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"Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
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return rc;
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}
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counters->rx_throughput = result;
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@ -390,7 +391,7 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle ArmCP PCI info pkt, error %d\n", rc);
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"Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
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return rc;
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}
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counters->tx_throughput = result;
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@ -403,7 +404,7 @@ int hl_fw_cpucp_pci_counters_get(struct hl_device *hdev,
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HL_CPUCP_INFO_TIMEOUT_USEC, &result);
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if (rc) {
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dev_err(hdev->dev,
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"Failed to handle ArmCP PCI info pkt, error %d\n", rc);
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"Failed to handle CPU-CP PCI info pkt, error %d\n", rc);
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return rc;
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}
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counters->replay_cnt = (u32) result;
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@ -466,7 +466,7 @@ struct hl_cs_job;
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#define HL_EQ_LENGTH 64
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#define HL_EQ_SIZE_IN_BYTES (HL_EQ_LENGTH * HL_EQ_ENTRY_SIZE)
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/* Host <-> ArmCP shared memory size */
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/* Host <-> CPU-CP shared memory size */
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#define HL_CPU_ACCESSIBLE_MEM_SIZE SZ_2M
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/**
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@ -648,7 +648,7 @@ enum div_select_defs {
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* @debugfs_read32: debug interface for reading u32 from DRAM/SRAM.
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* @debugfs_write32: debug interface for writing u32 to DRAM/SRAM.
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* @add_device_attr: add ASIC specific device attributes.
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* @handle_eqe: handle event queue entry (IRQ) from ArmCP.
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* @handle_eqe: handle event queue entry (IRQ) from CPU-CP.
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* @set_pll_profile: change PLL profile (manual/automatic).
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* @get_events_stat: retrieve event queue entries histogram.
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* @read_pte: read MMU page table entry from DRAM.
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@ -657,7 +657,7 @@ enum div_select_defs {
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* (L1 only) or hard (L0 & L1) flush.
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* @mmu_invalidate_cache_range: flush specific MMU STLB cache lines with
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* ASID-VA-size mask.
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* @send_heartbeat: send is-alive packet to ArmCP and verify response.
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* @send_heartbeat: send is-alive packet to CPU-CP and verify response.
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* @set_clock_gating: enable/disable clock gating per engine according to
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* clock gating mask in hdev
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* @disable_clock_gating: disable clock gating completely
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@ -1438,8 +1438,8 @@ struct hl_device_idle_busy_ts {
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* @dev: related kernel basic device structure.
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* @dev_ctrl: related kernel device structure for the control device
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* @work_freq: delayed work to lower device frequency if possible.
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* @work_heartbeat: delayed work for ArmCP is-alive check.
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* @asic_name: ASIC specific nmae.
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* @work_heartbeat: delayed work for CPU-CP is-alive check.
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* @asic_name: ASIC specific name.
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* @asic_type: ASIC specific type.
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* @completion_queue: array of hl_cq.
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* @cq_wq: work queues of completion queues for executing work in process
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@ -1450,14 +1450,14 @@ struct hl_device_idle_busy_ts {
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* @hw_queues_mirror_list: CS mirror list for TDR.
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* @hw_queues_mirror_lock: protects hw_queues_mirror_list.
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* @kernel_cb_mgr: command buffer manager for creating/destroying/handling CGs.
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* @event_queue: event queue for IRQ from ArmCP.
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* @event_queue: event queue for IRQ from CPU-CP.
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* @dma_pool: DMA pool for small allocations.
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* @cpu_accessible_dma_mem: Host <-> ArmCP shared memory CPU address.
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* @cpu_accessible_dma_address: Host <-> ArmCP shared memory DMA address.
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* @cpu_accessible_dma_pool: Host <-> ArmCP shared memory pool.
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* @cpu_accessible_dma_mem: Host <-> CPU-CP shared memory CPU address.
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* @cpu_accessible_dma_address: Host <-> CPU-CP shared memory DMA address.
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* @cpu_accessible_dma_pool: Host <-> CPU-CP shared memory pool.
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* @asid_bitmap: holds used/available ASIDs.
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* @asid_mutex: protects asid_bitmap.
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* @send_cpu_message_lock: enforces only one message in Host <-> ArmCP queue.
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* @send_cpu_message_lock: enforces only one message in Host <-> CPU-CP queue.
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* @debug_lock: protects critical section of setting debug mode for device
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* @asic_prop: ASIC specific immutable properties.
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* @asic_funcs: ASIC specific functions.
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@ -1511,7 +1511,7 @@ struct hl_device_idle_busy_ts {
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* @late_init_done: is late init stage was done during initialization.
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* @hwmon_initialized: is H/W monitor sensors was initialized.
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* @hard_reset_pending: is there a hard reset work pending.
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* @heartbeat: is heartbeat sanity check towards ArmCP enabled.
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* @heartbeat: is heartbeat sanity check towards CPU-CP enabled.
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* @reset_on_lockup: true if a reset should be done in case of stuck CS, false
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* otherwise.
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* @dram_supports_virtual_memory: is MMU enabled towards DRAM.
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@ -2854,7 +2854,7 @@ static int gaudi_init_cpu_queues(struct hl_device *hdev, u32 cpu_timeout)
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if (err) {
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dev_err(hdev->dev,
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"Failed to communicate with ARM CPU (ArmCP timeout)\n");
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"Failed to communicate with Device CPU (CPU-CP timeout)\n");
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return -EIO;
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}
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@ -5616,7 +5616,7 @@ static bool gaudi_tpc_read_interrupts(struct hl_device *hdev, u8 tpc_id,
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bool soft_reset_required = false;
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/* Accessing the TPC_INTR_CAUSE registers requires disabling the clock
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* gating, and thus cannot be done in ArmCP and should be done instead
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* gating, and thus cannot be done in CPU-CP and should be done instead
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* by the driver.
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*/
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@ -4509,7 +4509,7 @@ static int goya_unmask_irq_arr(struct hl_device *hdev, u32 *irq_arr,
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total_pkt_size = sizeof(struct cpucp_unmask_irq_arr_packet) +
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irq_arr_size;
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/* data should be aligned to 8 bytes in order to ArmCP to copy it */
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/* data should be aligned to 8 bytes in order to CPU-CP to copy it */
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total_pkt_size = (total_pkt_size + 0x7) & ~0x7;
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/* total_pkt_size is casted to u16 later on */
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