ARM: dts: r8a7743: Add APMU node and second CPU core
Add DT nodes for the Advanced Power Management Unit (APMU) and the second CPU core. Use the enable-method to point out that the APMU should be used for SMP support. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -30,6 +30,7 @@
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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enable-method = "renesas,apmu";
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cpu0: cpu@0 {
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device_type = "cpu";
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@ -41,6 +42,15 @@
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next-level-cache = <&L2_CA15>;
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};
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cpu1: cpu@1 {
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device_type = "cpu";
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compatible = "arm,cortex-a15";
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reg = <1>;
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clock-frequency = <1500000000>;
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power-domains = <&sysc R8A7743_PD_CA15_CPU1>;
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next-level-cache = <&L2_CA15>;
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};
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L2_CA15: cache-controller-0 {
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compatible = "cache";
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cache-unified;
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@ -57,6 +67,12 @@
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#size-cells = <2>;
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ranges;
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apmu@e6152000 {
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compatible = "renesas,r8a7743-apmu", "renesas,apmu";
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reg = <0 0xe6152000 0 0x188>;
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cpus = <&cpu0 &cpu1>;
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};
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gic: interrupt-controller@f1001000 {
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compatible = "arm,gic-400";
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#interrupt-cells = <3>;
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