drm/nouveau/fifo/gk104: add nvdec plumbing

Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
This commit is contained in:
Ben Skeggs 2016-03-11 13:09:28 +10:00
parent 9e4fff3205
commit 608fd040b7
3 changed files with 4 additions and 0 deletions

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@ -11,6 +11,7 @@ struct kepler_channel_gpfifo_a_v0 {
#define NVA06F_V0_ENGINE_MSPDEC 0x00000020 #define NVA06F_V0_ENGINE_MSPDEC 0x00000020
#define NVA06F_V0_ENGINE_MSPPP 0x00000040 #define NVA06F_V0_ENGINE_MSPPP 0x00000040
#define NVA06F_V0_ENGINE_MSENC 0x00000080 #define NVA06F_V0_ENGINE_MSENC 0x00000080
#define NVA06F_V0_ENGINE_NVDEC 0x00000200
#define NVA06F_V0_ENGINE_NVENC0 0x00000400 #define NVA06F_V0_ENGINE_NVENC0 0x00000400
#define NVA06F_V0_ENGINE_NVENC1 0x00000800 #define NVA06F_V0_ENGINE_NVENC1 0x00000800
#define NVA06F_V0_ENGINE_CE0 0x00010000 #define NVA06F_V0_ENGINE_CE0 0x00010000

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@ -737,6 +737,7 @@ gk104_fifo_oneinit(struct nvkm_fifo *base)
case 0x0000000d: engidx = NVKM_ENGINE_SEC; break; case 0x0000000d: engidx = NVKM_ENGINE_SEC; break;
case 0x0000000e: engidx = NVKM_ENGINE_NVENC0; break; case 0x0000000e: engidx = NVKM_ENGINE_NVENC0; break;
case 0x0000000f: engidx = NVKM_ENGINE_NVENC1; break; case 0x0000000f: engidx = NVKM_ENGINE_NVENC1; break;
case 0x00000010: engidx = NVKM_ENGINE_NVDEC; break;
break; break;
default: default:
break; break;

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@ -67,6 +67,7 @@ gk104_fifo_gpfifo_engine_addr(struct nvkm_engine *engine)
case NVKM_ENGINE_MSPPP : return 0x0260; case NVKM_ENGINE_MSPPP : return 0x0260;
case NVKM_ENGINE_MSVLD : return 0x0270; case NVKM_ENGINE_MSVLD : return 0x0270;
case NVKM_ENGINE_MSENC : return 0x0290; case NVKM_ENGINE_MSENC : return 0x0290;
case NVKM_ENGINE_NVDEC : return 0x02100270;
case NVKM_ENGINE_NVENC0: return 0x02100290; case NVKM_ENGINE_NVENC0: return 0x02100290;
case NVKM_ENGINE_NVENC1: return 0x0210; case NVKM_ENGINE_NVENC1: return 0x0210;
default: default:
@ -343,6 +344,7 @@ gk104_fifo_gpfifo[] = {
{ NVA06F_V0_ENGINE_MSPDEC, BIT_ULL(NVKM_ENGINE_MSPDEC) }, { NVA06F_V0_ENGINE_MSPDEC, BIT_ULL(NVKM_ENGINE_MSPDEC) },
{ NVA06F_V0_ENGINE_MSPPP , BIT_ULL(NVKM_ENGINE_MSPPP ) }, { NVA06F_V0_ENGINE_MSPPP , BIT_ULL(NVKM_ENGINE_MSPPP ) },
{ NVA06F_V0_ENGINE_MSENC , BIT_ULL(NVKM_ENGINE_MSENC ) }, { NVA06F_V0_ENGINE_MSENC , BIT_ULL(NVKM_ENGINE_MSENC ) },
{ NVA06F_V0_ENGINE_NVDEC , BIT_ULL(NVKM_ENGINE_NVDEC ) },
{ NVA06F_V0_ENGINE_NVENC0, BIT_ULL(NVKM_ENGINE_NVENC0) }, { NVA06F_V0_ENGINE_NVENC0, BIT_ULL(NVKM_ENGINE_NVENC0) },
{ NVA06F_V0_ENGINE_NVENC1, BIT_ULL(NVKM_ENGINE_NVENC1) }, { NVA06F_V0_ENGINE_NVENC1, BIT_ULL(NVKM_ENGINE_NVENC1) },
{ NVA06F_V0_ENGINE_CE0 , BIT_ULL(NVKM_ENGINE_CE0 ) }, { NVA06F_V0_ENGINE_CE0 , BIT_ULL(NVKM_ENGINE_CE0 ) },