arm64: dts: fvp/juno: Fix serial node names

The UARTs for all Arm Ltd. boards were using "uart" as their node name
stub.

Replace that with the required "serial" string, to comply with the PL011
DT binding.

Link: https://lore.kernel.org/r/20200513103016.130417-14-andre.przywara@arm.com
Signed-off-by: Andre Przywara <andre.przywara@arm.com>
Signed-off-by: Sudeep Holla <sudeep.holla@arm.com>
This commit is contained in:
Andre Przywara 2020-05-13 11:30:09 +01:00 committed by Sudeep Holla
parent edfac966f6
commit 608f1b6cf3
4 changed files with 13 additions and 13 deletions

View File

@ -316,7 +316,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
v2m_serial0: uart@90000 {
v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@ -324,7 +324,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial1: uart@a0000 {
v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@ -332,7 +332,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial2: uart@b0000 {
v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@ -340,7 +340,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial3: uart@c0000 {
v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;

View File

@ -189,7 +189,7 @@
reg = <0x010000 0x1000>;
};
v2m_serial0: uart@90000 {
v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@ -197,7 +197,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial1: uart@a0000 {
v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@ -205,7 +205,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial2: uart@b0000 {
v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@ -213,7 +213,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial3: uart@c0000 {
v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;

View File

@ -729,7 +729,7 @@
};
};
soc_uart0: uart@7ff80000 {
soc_uart0: serial@7ff80000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0 0x7ff80000 0x0 0x1000>;
interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;

View File

@ -158,7 +158,7 @@
clock-names = "KMIREFCLK", "apb_pclk";
};
v2m_serial0: uart@90000 {
v2m_serial0: serial@90000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x090000 0x1000>;
interrupts = <5>;
@ -166,7 +166,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial1: uart@a0000 {
v2m_serial1: serial@a0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0a0000 0x1000>;
interrupts = <6>;
@ -174,7 +174,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial2: uart@b0000 {
v2m_serial2: serial@b0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0b0000 0x1000>;
interrupts = <7>;
@ -182,7 +182,7 @@
clock-names = "uartclk", "apb_pclk";
};
v2m_serial3: uart@c0000 {
v2m_serial3: serial@c0000 {
compatible = "arm,pl011", "arm,primecell";
reg = <0x0c0000 0x1000>;
interrupts = <8>;