rt2x00: Align GPIO register definitions with the datasheets.

Ensure that all active GPIO pins are included in the GPIO register
definitions, nothing more and nothing less.

Signed-off-by: Gertjan van Wingerde <gwingerde@gmail.com>
Acked-by: Ivo Van Doorn <ivdoorn@gmail.com>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
This commit is contained in:
Gertjan van Wingerde 2012-08-31 19:22:12 +02:00 committed by John W. Linville
parent fac805f8c1
commit 605b55186b
4 changed files with 20 additions and 2 deletions

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@ -671,6 +671,13 @@
#define GPIOCSR_BIT6 FIELD32(0x00000040)
#define GPIOCSR_BIT7 FIELD32(0x00000080)
#define GPIOCSR_BIT8 FIELD32(0x00000100)
#define GPIOCSR_BIT9 FIELD32(0x00000200)
#define GPIOCSR_BIT10 FIELD32(0x00000400)
#define GPIOCSR_BIT11 FIELD32(0x00000800)
#define GPIOCSR_BIT12 FIELD32(0x00001000)
#define GPIOCSR_BIT13 FIELD32(0x00002000)
#define GPIOCSR_BIT14 FIELD32(0x00004000)
#define GPIOCSR_BIT15 FIELD32(0x00008000)
/*
* BBPPCSR: BBP Pin control register.

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@ -198,6 +198,13 @@
#define MAC_CSR19_BIT6 FIELD16(0x0040)
#define MAC_CSR19_BIT7 FIELD16(0x0080)
#define MAC_CSR19_BIT8 FIELD16(0x0100)
#define MAC_CSR19_BIT9 FIELD16(0x0200)
#define MAC_CSR19_BIT10 FIELD16(0x0400)
#define MAC_CSR19_BIT11 FIELD16(0x0800)
#define MAC_CSR19_BIT12 FIELD16(0x1000)
#define MAC_CSR19_BIT13 FIELD16(0x2000)
#define MAC_CSR19_BIT14 FIELD16(0x4000)
#define MAC_CSR19_BIT15 FIELD16(0x8000)
/*
* MAC_CSR20: LED control register.

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@ -459,6 +459,12 @@
#define GPIO_CTRL_CFG_GPIOD_BIT5 FIELD32(0x00002000)
#define GPIO_CTRL_CFG_GPIOD_BIT6 FIELD32(0x00004000)
#define GPIO_CTRL_CFG_GPIOD_BIT7 FIELD32(0x00008000)
#define GPIO_CTRL_CFG_BIT8 FIELD32(0x00010000)
#define GPIO_CTRL_CFG_BIT9 FIELD32(0x00020000)
#define GPIO_CTRL_CFG_BIT10 FIELD32(0x00040000)
#define GPIO_CTRL_CFG_GPIOD_BIT8 FIELD32(0x01000000)
#define GPIO_CTRL_CFG_GPIOD_BIT9 FIELD32(0x02000000)
#define GPIO_CTRL_CFG_GPIOD_BIT10 FIELD32(0x04000000)
/*
* MCU_CMD_CFG

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@ -365,8 +365,6 @@ struct hw_pairwise_ta_entry {
#define MAC_CSR13_BIT3 FIELD32(0x00000008)
#define MAC_CSR13_BIT4 FIELD32(0x00000010)
#define MAC_CSR13_BIT5 FIELD32(0x00000020)
#define MAC_CSR13_BIT6 FIELD32(0x00000040)
#define MAC_CSR13_BIT7 FIELD32(0x00000080)
#define MAC_CSR13_BIT8 FIELD32(0x00000100)
#define MAC_CSR13_BIT9 FIELD32(0x00000200)
#define MAC_CSR13_BIT10 FIELD32(0x00000400)