ASoC: mediatek: cleanup audio driver for MT2701
Cleanup unused code such as 'i2s_num' guard, headers, indentation and some defines. Signed-off-by: Ryder Lee <ryder.lee@mediatek.com> Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Ryder Lee
Mark Brown
parent
d8d99d8ed6
commit
600b2fd4f0
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@ -14,10 +14,6 @@
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* GNU General Public License for more details.
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*/
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#include <sound/soc.h>
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#include <linux/regmap.h>
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#include <linux/pm_runtime.h>
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#include "mt2701-afe-common.h"
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#include "mt2701-afe-clock-ctrl.h"
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@ -223,8 +219,8 @@ int mt2701_afe_enable_clock(struct mtk_base_afe *afe)
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}
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regmap_update_bits(afe->regmap, ASYS_TOP_CON,
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AUDIO_TOP_CON0_A1SYS_A2SYS_ON,
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AUDIO_TOP_CON0_A1SYS_A2SYS_ON);
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ASYS_TOP_CON_ASYS_TIMING_ON,
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ASYS_TOP_CON_ASYS_TIMING_ON);
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regmap_update_bits(afe->regmap, AFE_DAC_CON0,
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AFE_DAC_CON0_AFE_ON,
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AFE_DAC_CON0_AFE_ON);
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@ -239,7 +235,7 @@ int mt2701_afe_enable_clock(struct mtk_base_afe *afe)
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int mt2701_afe_disable_clock(struct mtk_base_afe *afe)
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{
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regmap_update_bits(afe->regmap, ASYS_TOP_CON,
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AUDIO_TOP_CON0_A1SYS_A2SYS_ON, 0);
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ASYS_TOP_CON_ASYS_TIMING_ON, 0);
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regmap_update_bits(afe->regmap, AFE_DAC_CON0,
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AFE_DAC_CON0_AFE_ON, 0);
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@ -272,7 +268,3 @@ void mt2701_mclk_configuration(struct mtk_base_afe *afe, int id, int domain,
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if (ret)
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dev_err(afe->dev, "failed to set mclk divider %d\n", ret);
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}
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MODULE_DESCRIPTION("MT2701 afe clock control");
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MODULE_AUTHOR("Garlic Tseng <garlic.tseng@mediatek.com>");
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MODULE_LICENSE("GPL v2");
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@ -16,6 +16,7 @@
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#ifndef _MT_2701_AFE_COMMON_H_
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#define _MT_2701_AFE_COMMON_H_
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#include <sound/soc.h>
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#include <linux/clk.h>
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#include <linux/regmap.h>
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@ -25,16 +26,7 @@
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#define MT2701_STREAM_DIR_NUM (SNDRV_PCM_STREAM_LAST + 1)
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#define MT2701_PLL_DOMAIN_0_RATE 98304000
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#define MT2701_PLL_DOMAIN_1_RATE 90316800
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#define MT2701_AUD_AUD_MUX1_DIV_RATE (MT2701_PLL_DOMAIN_0_RATE / 2)
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#define MT2701_AUD_AUD_MUX2_DIV_RATE (MT2701_PLL_DOMAIN_1_RATE / 2)
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enum {
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MT2701_I2S_1,
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MT2701_I2S_2,
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MT2701_I2S_3,
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MT2701_I2S_4,
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MT2701_I2S_NUM,
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};
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#define MT2701_I2S_NUM 4
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enum {
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MT2701_MEMIF_DL1,
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@ -62,8 +54,7 @@ enum {
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};
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enum {
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MT2701_IRQ_ASYS_START,
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MT2701_IRQ_ASYS_IRQ1 = MT2701_IRQ_ASYS_START,
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MT2701_IRQ_ASYS_IRQ1,
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MT2701_IRQ_ASYS_IRQ2,
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MT2701_IRQ_ASYS_IRQ3,
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MT2701_IRQ_ASYS_END,
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@ -100,9 +91,6 @@ static const unsigned int mt2701_afe_backup_list[] = {
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AFE_MEMIF_PBUF_SIZE,
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};
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struct snd_pcm_substream;
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struct mtk_base_irq_data;
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struct mt2701_i2s_data {
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int i2s_ctrl_reg;
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int i2s_asrc_fs_shift;
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@ -120,7 +108,7 @@ struct mt2701_i2s_path {
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int mclk_rate;
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int on[I2S_DIR_NUM];
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int occupied[I2S_DIR_NUM];
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const struct mt2701_i2s_data *i2s_data[2];
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const struct mt2701_i2s_data *i2s_data[I2S_DIR_NUM];
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struct clk *hop_ck[I2S_DIR_NUM];
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struct clk *sel_ck;
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struct clk *div_ck;
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@ -20,16 +20,12 @@
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/pm_runtime.h>
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#include <sound/soc.h>
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#include "mt2701-afe-common.h"
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#include "mt2701-afe-clock-ctrl.h"
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#include "../common/mtk-afe-platform-driver.h"
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#include "../common/mtk-afe-fe-dai.h"
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#define AFE_IRQ_STATUS_BITS 0xff
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static const struct snd_pcm_hardware mt2701_afe_hardware = {
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.info = SNDRV_PCM_INFO_MMAP | SNDRV_PCM_INFO_INTERLEAVED
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| SNDRV_PCM_INFO_RESUME | SNDRV_PCM_INFO_MMAP_VALID,
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@ -107,21 +103,16 @@ static int mt2701_afe_i2s_startup(struct snd_pcm_substream *substream,
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static int mt2701_afe_i2s_path_shutdown(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai,
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int i2s_num,
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int dir_invert)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
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struct mt2701_afe_private *afe_priv = afe->platform_priv;
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int i2s_num = mt2701_dai_num_to_i2s(afe, dai->id);
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struct mt2701_i2s_path *i2s_path;
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struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[i2s_num];
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const struct mt2701_i2s_data *i2s_data;
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int stream_dir = substream->stream;
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if (i2s_num < 0)
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return i2s_num;
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i2s_path = &afe_priv->i2s_path[i2s_num];
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if (dir_invert) {
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if (stream_dir == SNDRV_PCM_STREAM_PLAYBACK)
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stream_dir = SNDRV_PCM_STREAM_CAPTURE;
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@ -167,11 +158,11 @@ static void mt2701_afe_i2s_shutdown(struct snd_pcm_substream *substream,
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else
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goto I2S_UNSTART;
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mt2701_afe_i2s_path_shutdown(substream, dai, 0);
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mt2701_afe_i2s_path_shutdown(substream, dai, i2s_num, 0);
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/* need to disable i2s-out path when disable i2s-in */
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if (substream->stream == SNDRV_PCM_STREAM_CAPTURE)
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mt2701_afe_i2s_path_shutdown(substream, dai, 1);
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mt2701_afe_i2s_path_shutdown(substream, dai, i2s_num, 1);
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I2S_UNSTART:
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/* disable mclk */
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@ -180,24 +171,19 @@ I2S_UNSTART:
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static int mt2701_i2s_path_prepare_enable(struct snd_pcm_substream *substream,
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struct snd_soc_dai *dai,
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int i2s_num,
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int dir_invert)
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{
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struct snd_soc_pcm_runtime *rtd = substream->private_data;
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struct mtk_base_afe *afe = snd_soc_platform_get_drvdata(rtd->platform);
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struct mt2701_afe_private *afe_priv = afe->platform_priv;
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int i2s_num = mt2701_dai_num_to_i2s(afe, dai->id);
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struct mt2701_i2s_path *i2s_path;
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struct mt2701_i2s_path *i2s_path = &afe_priv->i2s_path[i2s_num];
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const struct mt2701_i2s_data *i2s_data;
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struct snd_pcm_runtime * const runtime = substream->runtime;
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int reg, fs, w_len = 1; /* now we support bck 64bits only */
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int stream_dir = substream->stream;
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unsigned int mask = 0, val = 0;
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if (i2s_num < 0)
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return i2s_num;
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i2s_path = &afe_priv->i2s_path[i2s_num];
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if (dir_invert) {
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if (stream_dir == SNDRV_PCM_STREAM_PLAYBACK)
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stream_dir = SNDRV_PCM_STREAM_CAPTURE;
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@ -288,13 +274,13 @@ static int mt2701_afe_i2s_prepare(struct snd_pcm_substream *substream,
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mt2701_mclk_configuration(afe, i2s_num, clk_domain, mclk_rate);
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if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) {
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mt2701_i2s_path_prepare_enable(substream, dai, 0);
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mt2701_i2s_path_prepare_enable(substream, dai, i2s_num, 0);
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} else {
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/* need to enable i2s-out path when enable i2s-in */
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/* prepare for another direction "out" */
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mt2701_i2s_path_prepare_enable(substream, dai, 1);
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mt2701_i2s_path_prepare_enable(substream, dai, i2s_num, 1);
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/* prepare for "in" */
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mt2701_i2s_path_prepare_enable(substream, dai, 0);
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mt2701_i2s_path_prepare_enable(substream, dai, i2s_num, 0);
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}
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return 0;
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@ -562,7 +548,6 @@ static const struct snd_soc_dai_ops mt2701_single_memif_dai_ops = {
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.hw_free = mtk_afe_fe_hw_free,
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.prepare = mtk_afe_fe_prepare,
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.trigger = mtk_afe_fe_trigger,
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};
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static const struct snd_soc_dai_ops mt2701_dlm_memif_dai_ops = {
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@ -903,31 +888,6 @@ static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_i2s4[] = {
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PWR2_TOP_CON, 19, 1, 0),
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};
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static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc0[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("Asrc0 out Switch", AUDIO_TOP_CON4, 14, 1,
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1),
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};
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static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc1[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("Asrc1 out Switch", AUDIO_TOP_CON4, 15, 1,
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1),
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};
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static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc2[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("Asrc2 out Switch", PWR2_TOP_CON, 6, 1,
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1),
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};
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static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc3[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("Asrc3 out Switch", PWR2_TOP_CON, 7, 1,
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1),
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};
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static const struct snd_kcontrol_new mt2701_afe_multi_ch_out_asrc4[] = {
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SOC_DAPM_SINGLE_AUTODISABLE("Asrc4 out Switch", PWR2_TOP_CON, 8, 1,
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1),
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};
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static const struct snd_soc_dapm_widget mt2701_afe_pcm_widgets[] = {
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/* inter-connections */
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SND_SOC_DAPM_MIXER("I00", SND_SOC_NOPM, 0, 0, NULL, 0),
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@ -987,19 +947,6 @@ static const struct snd_soc_dapm_widget mt2701_afe_pcm_widgets[] = {
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SND_SOC_DAPM_MIXER("I18I19", SND_SOC_NOPM, 0, 0,
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mt2701_afe_multi_ch_out_i2s3,
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ARRAY_SIZE(mt2701_afe_multi_ch_out_i2s3)),
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SND_SOC_DAPM_MIXER("ASRC_O0", SND_SOC_NOPM, 0, 0,
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mt2701_afe_multi_ch_out_asrc0,
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ARRAY_SIZE(mt2701_afe_multi_ch_out_asrc0)),
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SND_SOC_DAPM_MIXER("ASRC_O1", SND_SOC_NOPM, 0, 0,
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mt2701_afe_multi_ch_out_asrc1,
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ARRAY_SIZE(mt2701_afe_multi_ch_out_asrc1)),
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SND_SOC_DAPM_MIXER("ASRC_O2", SND_SOC_NOPM, 0, 0,
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mt2701_afe_multi_ch_out_asrc2,
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ARRAY_SIZE(mt2701_afe_multi_ch_out_asrc2)),
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SND_SOC_DAPM_MIXER("ASRC_O3", SND_SOC_NOPM, 0, 0,
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mt2701_afe_multi_ch_out_asrc3,
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ARRAY_SIZE(mt2701_afe_multi_ch_out_asrc3)),
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};
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static const struct snd_soc_dapm_route mt2701_afe_pcm_routes[] = {
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@ -1009,7 +956,6 @@ static const struct snd_soc_dapm_route mt2701_afe_pcm_routes[] = {
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{"I2S0 Playback", NULL, "O15"},
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{"I2S0 Playback", NULL, "O16"},
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{"I2S1 Playback", NULL, "O17"},
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{"I2S1 Playback", NULL, "O18"},
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{"I2S2 Playback", NULL, "O19"},
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@ -1026,7 +972,6 @@ static const struct snd_soc_dapm_route mt2701_afe_pcm_routes[] = {
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{"I00", NULL, "I2S0 Capture"},
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{"I01", NULL, "I2S0 Capture"},
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{"I02", NULL, "I2S1 Capture"},
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{"I03", NULL, "I2S1 Capture"},
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/* I02,03 link to UL2, also need to open I2S0 */
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@ -1034,15 +979,10 @@ static const struct snd_soc_dapm_route mt2701_afe_pcm_routes[] = {
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{"I26", NULL, "BT Capture"},
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{"ASRC_O0", "Asrc0 out Switch", "DLM"},
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{"ASRC_O1", "Asrc1 out Switch", "DLM"},
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{"ASRC_O2", "Asrc2 out Switch", "DLM"},
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{"ASRC_O3", "Asrc3 out Switch", "DLM"},
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{"I12I13", "Multich I2S0 Out Switch", "ASRC_O0"},
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{"I14I15", "Multich I2S1 Out Switch", "ASRC_O1"},
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{"I16I17", "Multich I2S2 Out Switch", "ASRC_O2"},
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{"I18I19", "Multich I2S3 Out Switch", "ASRC_O3"},
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{"I12I13", "Multich I2S0 Out Switch", "DLM"},
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{"I14I15", "Multich I2S1 Out Switch", "DLM"},
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{"I16I17", "Multich I2S2 Out Switch", "DLM"},
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{"I18I19", "Multich I2S3 Out Switch", "DLM"},
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{ "I12", NULL, "I12I13" },
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{ "I13", NULL, "I12I13" },
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@ -1067,7 +1007,6 @@ static const struct snd_soc_dapm_route mt2701_afe_pcm_routes[] = {
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{ "O21", "I18 Switch", "I18" },
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{ "O22", "I19 Switch", "I19" },
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{ "O31", "I35 Switch", "I35" },
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};
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static const struct snd_soc_component_driver mt2701_afe_pcm_dai_component = {
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@ -1484,12 +1423,13 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
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afe = devm_kzalloc(&pdev->dev, sizeof(*afe), GFP_KERNEL);
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if (!afe)
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return -ENOMEM;
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afe->platform_priv = devm_kzalloc(&pdev->dev, sizeof(*afe_priv),
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GFP_KERNEL);
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if (!afe->platform_priv)
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return -ENOMEM;
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afe_priv = afe->platform_priv;
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afe_priv = afe->platform_priv;
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afe->dev = &pdev->dev;
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dev = afe->dev;
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@ -1524,7 +1464,6 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
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afe->memif_size = MT2701_MEMIF_NUM;
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afe->memif = devm_kcalloc(dev, afe->memif_size, sizeof(*afe->memif),
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GFP_KERNEL);
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if (!afe->memif)
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return -ENOMEM;
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@ -1537,7 +1476,6 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
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afe->irqs_size = MT2701_IRQ_ASYS_END;
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afe->irqs = devm_kcalloc(dev, afe->irqs_size, sizeof(*afe->irqs),
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GFP_KERNEL);
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if (!afe->irqs)
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return -ENOMEM;
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@ -1555,7 +1493,6 @@ static int mt2701_afe_pcm_dev_probe(struct platform_device *pdev)
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afe->mtk_afe_hardware = &mt2701_afe_hardware;
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afe->memif_fs = mt2701_memif_fs;
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afe->irq_fs = mt2701_irq_fs;
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afe->reg_back_up_list = mt2701_afe_backup_list;
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afe->reg_back_up_list_num = ARRAY_SIZE(mt2701_afe_backup_list);
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afe->runtime_resume = mt2701_afe_runtime_resume;
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@ -1646,4 +1583,3 @@ module_platform_driver(mt2701_afe_pcm_driver);
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MODULE_DESCRIPTION("Mediatek ALSA SoC AFE platform driver for 2701");
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MODULE_AUTHOR("Garlic Tseng <garlic.tseng@mediatek.com>");
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MODULE_LICENSE("GPL v2");
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@ -17,17 +17,6 @@
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#ifndef _MT2701_REG_H_
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#define _MT2701_REG_H_
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#include <linux/delay.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <linux/pm_runtime.h>
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#include <sound/soc.h>
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#include "mt2701-afe-common.h"
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/*****************************************************************************
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* R E G I S T E R D E F I N I T I O N
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*****************************************************************************/
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#define AUDIO_TOP_CON0 0x0000
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#define AUDIO_TOP_CON4 0x0010
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#define AUDIO_TOP_CON5 0x0014
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@ -109,18 +98,6 @@
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#define AFE_DAI_BASE 0x1370
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#define AFE_DAI_CUR 0x137c
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/* AUDIO_TOP_CON0 (0x0000) */
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#define AUDIO_TOP_CON0_A1SYS_A2SYS_ON (0x3 << 0)
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#define AUDIO_TOP_CON0_PDN_AFE (0x1 << 2)
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#define AUDIO_TOP_CON0_PDN_APLL_CK (0x1 << 23)
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/* AUDIO_TOP_CON4 (0x0010) */
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#define AUDIO_TOP_CON4_I2SO1_PWN (0x1 << 6)
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#define AUDIO_TOP_CON4_PDN_A1SYS (0x1 << 21)
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#define AUDIO_TOP_CON4_PDN_A2SYS (0x1 << 22)
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#define AUDIO_TOP_CON4_PDN_AFE_CONN (0x1 << 23)
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#define AUDIO_TOP_CON4_PDN_MRGIF (0x1 << 25)
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/* AFE_DAIBT_CON0 (0x001c) */
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#define AFE_DAIBT_CON0_DAIBT_EN (0x1 << 0)
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#define AFE_DAIBT_CON0_BT_FUNC_EN (0x1 << 1)
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@ -137,22 +114,8 @@
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#define AFE_MRGIF_CON_I2S_MODE_MASK (0xf << 20)
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#define AFE_MRGIF_CON_I2S_MODE_32K (0x4 << 20)
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/* ASYS_I2SO1_CON (0x061c) */
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#define ASYS_I2SO1_CON_FS (0x1f << 8)
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#define ASYS_I2SO1_CON_FS_SET(x) ((x) << 8)
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#define ASYS_I2SO1_CON_MULTI_CH (0x1 << 16)
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#define ASYS_I2SO1_CON_SIDEGEN (0x1 << 30)
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#define ASYS_I2SO1_CON_I2S_EN (0x1 << 0)
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/* 0:EIAJ 1:I2S */
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#define ASYS_I2SO1_CON_I2S_MODE (0x1 << 3)
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#define ASYS_I2SO1_CON_WIDE_MODE (0x1 << 1)
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#define ASYS_I2SO1_CON_WIDE_MODE_SET(x) ((x) << 1)
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/* PWR2_TOP_CON (0x0634) */
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#define PWR2_TOP_CON_INIT_VAL (0xffe1ffff)
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/* ASYS_IRQ_CLR (0x07c0) */
|
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#define ASYS_IRQ_CLR_ALL (0xffffffff)
|
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/* ASYS_TOP_CON (0x0600) */
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#define ASYS_TOP_CON_ASYS_TIMING_ON (0x3 << 0)
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/* PWR2_ASM_CON1 (0x1070) */
|
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#define PWR2_ASM_CON1_INIT_VAL (0x492492)
|
||||
|
|
|
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Loading…
Reference in New Issue