parisc/pgtable: Do not drop upper 5 address bits of physical address
commit 166b0110d1ee53290bd11618df6e3991c117495a upstream. When calculating the pfn for the iitlbt/idtlbt instruction, do not drop the upper 5 address bits. This doesn't seem to have an effect on physical hardware which uses less physical address bits, but in qemu the missing bits are visible. Signed-off-by: Helge Deller <deller@gmx.de> Cc: <stable@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -475,13 +475,13 @@
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* to a CPU TLB 4k PFN (4k => 12 bits to shift) */
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#define PAGE_ADD_SHIFT (PAGE_SHIFT-12)
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#define PAGE_ADD_HUGE_SHIFT (REAL_HPAGE_SHIFT-12)
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#define PFN_START_BIT (63-ASM_PFN_PTE_SHIFT+(63-58)-PAGE_ADD_SHIFT)
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/* Drop prot bits and convert to page addr for iitlbt and idtlbt */
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.macro convert_for_tlb_insert20 pte,tmp
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#ifdef CONFIG_HUGETLB_PAGE
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copy \pte,\tmp
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extrd,u \tmp,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
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64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
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extrd,u \tmp,PFN_START_BIT,PFN_START_BIT+1,\pte
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depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_SHIFT,\pte
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@ -489,8 +489,7 @@
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depdi _HUGE_PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_HUGE_SHIFT,\pte
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#else /* Huge pages disabled */
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extrd,u \pte,(63-ASM_PFN_PTE_SHIFT)+(63-58)+PAGE_ADD_SHIFT,\
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64-PAGE_SHIFT-PAGE_ADD_SHIFT,\pte
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extrd,u \pte,PFN_START_BIT,PFN_START_BIT+1,\pte
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depdi _PAGE_SIZE_ENCODING_DEFAULT,63,\
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(63-58)+PAGE_ADD_SHIFT,\pte
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#endif
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