[MTD] Introduce MTD_BIT_WRITEABLE
o Add a flag MTD_BIT_WRITEABLE for devices that allow single bits to be cleared. o Replace MTD_PROGRAM_REGIONS with a cleared MTD_BIT_WRITEABLE flag for STMicro and Intel Sibley flashes with internal ECC. Those flashes disallow clearing of single bits, unlike regular NOR flashes, so the new flag models their behaviour better. o Remove MTD_ECC. After the STMicro/Sibley merge, this flag is only set and never checked. Signed-off-by: Joern Engel <joern@wh.fh-wedel.de>
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@ -548,7 +548,7 @@ static int cfi_intelext_partition_fixup(struct mtd_info *mtd,
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mtd->writesize = cfi->interleave << prinfo->ProgRegShift;
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MTD_PROGREGION_CTRLMODE_VALID(mtd) = cfi->interleave * prinfo->ControlValid;
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MTD_PROGREGION_CTRLMODE_INVALID(mtd) = cfi->interleave * prinfo->ControlInvalid;
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mtd->flags |= MTD_PROGRAM_REGIONS;
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mtd->flags &= ~MTD_BIT_WRITEABLE;
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printk(KERN_DEBUG "%s: program region size/ctrl_valid/ctrl_inval = %d/%d/%d\n",
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map->name, mtd->writesize,
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MTD_PROGREGION_CTRLMODE_VALID(mtd),
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@ -238,8 +238,7 @@ static struct mtd_info *cfi_staa_setup(struct map_info *map)
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mtd->unlock = cfi_staa_unlock;
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mtd->suspend = cfi_staa_suspend;
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mtd->resume = cfi_staa_resume;
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mtd->flags = MTD_CAP_NORFLASH;
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mtd->flags |= MTD_PROGRAM_REGIONS; /* FIXME: Not all STMicro flashes have this */
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mtd->flags = MTD_CAP_NORFLASH & ~MTD_BIT_WRITEABLE;
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mtd->writesize = 8; /* FIXME: Should be 0 for STMicro flashes w/out ECC */
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map->fldrv = &cfi_staa_chipdrv;
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__module_get(THIS_MODULE);
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@ -2668,7 +2668,7 @@ int nand_scan(struct mtd_info *mtd, int maxchips)
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/* Fill in remaining MTD driver data */
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mtd->type = MTD_NANDFLASH;
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mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
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mtd->flags = MTD_CAP_NANDFLASH;
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mtd->ecctype = MTD_ECC_SW;
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mtd->erase = nand_erase;
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mtd->point = NULL;
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@ -1943,7 +1943,7 @@ int onenand_scan(struct mtd_info *mtd, int maxchips)
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/* Fill in remaining MTD driver data */
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mtd->type = MTD_NANDFLASH;
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mtd->flags = MTD_CAP_NANDFLASH | MTD_ECC;
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mtd->flags = MTD_CAP_NANDFLASH;
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mtd->ecctype = MTD_ECC_SW;
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mtd->erase = onenand_erase;
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mtd->point = NULL;
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@ -105,9 +105,7 @@ static inline void jffs2_init_inode_info(struct jffs2_inode_info *f)
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#ifdef CONFIG_JFFS2_SUMMARY
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#define jffs2_can_mark_obsolete(c) (0)
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#else
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#define jffs2_can_mark_obsolete(c) \
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((c->mtd->type == MTD_NORFLASH && !(c->mtd->flags & (MTD_PROGRAM_REGIONS))) || \
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c->mtd->type == MTD_RAM)
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#define jffs2_can_mark_obsolete(c) (c->mtd->flags & (MTD_BIT_WRITEABLE))
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#endif
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#define jffs2_cleanmarker_oob(c) (c->mtd->type == MTD_NANDFLASH)
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@ -135,7 +133,7 @@ void jffs2_nand_flash_cleanup(struct jffs2_sb_info *c);
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int jffs2_dataflash_setup(struct jffs2_sb_info *c);
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void jffs2_dataflash_cleanup(struct jffs2_sb_info *c);
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#define jffs2_nor_wbuf_flash(c) (c->mtd->type == MTD_NORFLASH && (c->mtd->flags & MTD_PROGRAM_REGIONS))
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#define jffs2_nor_wbuf_flash(c) (c->mtd->type == MTD_NORFLASH && ! (c->mtd->flags & MTD_BIT_WRITEABLE))
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int jffs2_nor_wbuf_flash_setup(struct jffs2_sb_info *c);
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void jffs2_nor_wbuf_flash_cleanup(struct jffs2_sb_info *c);
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@ -30,14 +30,13 @@ struct mtd_oob_buf {
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#define MTD_NANDFLASH 4
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#define MTD_DATAFLASH 6
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#define MTD_ECC 128 // Device capable of automatic ECC
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#define MTD_PROGRAM_REGIONS 512 // Configurable Programming Regions
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#define MTD_WRITEABLE 0x400 /* Device is writeable */
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#define MTD_BIT_WRITEABLE 0x800 /* Single bits can be flipped */
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// Some common devices / combinations of capabilities
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#define MTD_CAP_ROM 0
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#define MTD_CAP_RAM (MTD_WRITEABLE)
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#define MTD_CAP_NORFLASH (MTD_WRITEABLE)
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#define MTD_CAP_RAM (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
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#define MTD_CAP_NORFLASH (MTD_WRITEABLE | MTD_BIT_WRITEABLE)
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#define MTD_CAP_NANDFLASH (MTD_WRITEABLE)
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