staging: iio: adc: remove the use of CamelCase
Remove the use of CamelCase to follow the kernel naming conventions Signed-off-by: Ioana Ciornei <ciorneiioana@gmail.com> Reviewed-by: Daniel Baluta <daniel.baluta@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -124,7 +124,7 @@
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#define AD7192_GPOCON_P1DAT BIT(1) /* P1 state */
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#define AD7192_GPOCON_P0DAT BIT(0) /* P0 state */
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#define AD7192_INT_FREQ_MHz 4915200
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#define AD7192_INT_FREQ_MHZ 4915200
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/* NOTE:
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* The AD7190/2/5 features a dual use data out ready DOUT/RDY output.
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@ -228,14 +228,14 @@ static int ad7192_setup(struct ad7192_state *st,
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switch (pdata->clock_source_sel) {
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case AD7192_CLK_EXT_MCLK1_2:
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case AD7192_CLK_EXT_MCLK2:
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st->mclk = AD7192_INT_FREQ_MHz;
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st->mclk = AD7192_INT_FREQ_MHZ;
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break;
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case AD7192_CLK_INT:
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case AD7192_CLK_INT_CO:
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if (pdata->ext_clk_Hz)
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st->mclk = pdata->ext_clk_Hz;
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if (pdata->ext_clk_hz)
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st->mclk = pdata->ext_clk_hz;
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else
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st->mclk = AD7192_INT_FREQ_MHz;
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st->mclk = AD7192_INT_FREQ_MHZ;
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break;
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default:
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ret = -EINVAL;
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@ -34,7 +34,7 @@
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struct ad7192_platform_data {
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u16 vref_mv;
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u8 clock_source_sel;
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u32 ext_clk_Hz;
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u32 ext_clk_hz;
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bool refin2_en;
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bool rej60_en;
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bool sinc3_en;
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@ -89,7 +89,7 @@
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#define AD7280A_ALL_CELLS (0xAD << 16)
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#define AD7280A_MAX_SPI_CLK_Hz 700000 /* < 1MHz */
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#define AD7280A_MAX_SPI_CLK_HZ 700000 /* < 1MHz */
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#define AD7280A_MAX_CHAIN 8
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#define AD7280A_CELLS_PER_DEV 6
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#define AD7280A_BITS 12
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@ -853,7 +853,7 @@ static int ad7280_probe(struct spi_device *spi)
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ad7280_crc8_build_table(st->crc_tab);
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st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_Hz;
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st->spi->max_speed_hz = AD7280A_MAX_SPI_CLK_HZ;
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st->spi->mode = SPI_MODE_1;
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spi_setup(st->spi);
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