Some more dts changes via Benoit Cousson <bcousson@baylibre.com>:
Add a lot of N900 nodes Add OPP table to OMAP5/DRA7 Add support for Newflow NanoBone board Add i2c aliases Add McASP and audio support Add reset/idle on init bindings for OMAP Add more nodes for AM4272 -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.15 (GNU/Linux) iQIcBAABAgAGBQJSZ6KqAAoJEBvUPslcq6VzXQ8P/2FfipJA3iJkI69sqghLDFqt Gx9cen4CzEsMv/9sLYQxkxw01xYUivHLFAQGL593aJTobbaSeyYCcfvJPB8Y9Jel jwoDxF3KbhnqT6PpJild+uJYeWg5UsiZcbreGgpxXj15KYSiwCUY97ga6iCQrUYt pqzC39DP1eViynaRYSIZjxOKKxpfUS5XWAMCsEsMr8UU9p15BsgZTbg2hwgVX3PG +e9/Mpfp7T1Tf6c85mCfCKjvVr4zvdJTgqphYfQFySzyPIww0FoHLjGoCZB8PjxG WSVw+i+yMCIZcAq90JIzgJ2PyD65ZKMRv9/5vxAh2UHXu7xxO8gLG3KWonN5ogMT xTiw+dPTZC8h12i2uFYxutLhV7nLVe3PKbjWMsdV7qXPVpZw9L8DmcHmIyzakKb6 jkHk6vQfR2pFw8B93TzptziQULS8TIVc3aKwalELm+4LtMkhAJIrv81BTMAb/zC6 moskG5/YbVEh6NR7x53aIXWfm2uUfLo/rRWp8kwmRQWDKe8bjZg+HGzp5/aKdqrh /ane2I0g5qVqB3Ivn7bNTWl4rN+NlTYFKZQ653fbFPbtVeTUh6gvAo5LYdwuJzvc DmhG176wbmkhBH2IoJKqwr9JsMTuuFKH1adT9WKi2PWvseX8Z0iwf+1dpm0l8sNl xlxoKEHneJjVEtEq8T5K =8KX8 -----END PGP SIGNATURE----- Merge tag 'omap-for-v3.13/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into next/dt Some more dts changes from Benoit Cousson <bcousson@baylibre.com> via Tony Lindgren: - Add a lot of N900 nodes - Add OPP table to OMAP5/DRA7 - Add support for Newflow NanoBone board - Add i2c aliases - Add McASP and audio support - Add reset/idle on init bindings for OMAP - Add more nodes for AM4272 * tag 'omap-for-v3.13/dt-late' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: (42 commits) ARM: dts: omap5-uevm: Remove pinmux for dmic pins ARM: dts: omap5-uevm: Correct twl6040 reset GPIO pinmux ARM: dts: TWL4030: Add power button support ARM: dts: omap3-n900: Add LP5523 support ARM: dts: omap3-n900: Add TLV320AIC3X support ARM: dts: omap3-n900:: Mux RX51_LCD_RESET_GPIO in DTS ARM: dts: omap3-n900: Add NAND support ARM: dts: omap3-n900: Specify regulator info ARM: dts: TWL4030: Add missing regulators ARM: dts: omap3-n900: Add LP5523 support ARM: dts: omap3-n900: Add vibrator device ARM: dts: omap3-n900: GPIO key definitions ARM: dts: omap3-n900: Add support for SD cards ARM: dts: omap3-n900: Add UART support ARM: dts: omap3-n900: Fix i2c bus speed ARM: dts: omap3-n900: Add pinctrl for i2c devices ARM: dts: DRA7: Add CPU OPP table ARM: dts: OMAP5: Add CPU OPP table ARM: dts: dra7-evm: add smps123 supply for CPU ARM: dts: omap5-uevm: add smps123 supply for CPU ... Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
Olof Johansson
commit
5f55c317e4
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@ -21,7 +21,8 @@ Required properties:
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|||
Optional properties:
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- ti,no_idle_on_suspend: When present, it prevents the PM to idle the module
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during suspend.
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- ti,no-reset-on-init: When present, the module should not be reset at init
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- ti,no-idle-on-init: When present, the module should not be idled at init
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Example:
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|
|
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@ -6088,6 +6088,12 @@ L: linux-omap@vger.kernel.org
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S: Maintained
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F: drivers/gpio/gpio-omap.c
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OMAP/NEWFLOW NANOBONE MACHINE SUPPORT
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M: Mark Jackson <mpfj@newflow.co.uk>
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L: linux-omap@vger.kernel.org
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S: Maintained
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F: arch/arm/boot/dts/am335x-nano.dts
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OMFS FILESYSTEM
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M: Bob Copeland <me@bobcopeland.com>
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L: linux-karma-devel@lists.sourceforge.net
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@ -197,6 +197,7 @@ dtb-$(CONFIG_ARCH_OMAP2PLUS) += omap2420-h4.dtb \
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am335x-evmsk.dtb \
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am335x-bone.dtb \
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am335x-boneblack.dtb \
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am335x-nano.dtb \
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am335x-base0033.dtb \
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am3517-evm.dtb \
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am3517_mt_ventoux.dtb \
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|
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@ -119,6 +119,19 @@
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};
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};
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};
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sound {
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compatible = "ti,da830-evm-audio";
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ti,model = "AM335x-EVM";
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ti,audio-codec = <&tlv320aic3106>;
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ti,mcasp-controller = <&mcasp1>;
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ti,codec-clock-rate = <12000000>;
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ti,audio-routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT",
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"LINE1L", "Line In",
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"LINE1R", "Line In";
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};
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};
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&am33xx_pinmux {
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@ -279,6 +292,15 @@
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0xec 0x00 /* lcd_ac_bias_en.lcd_ac_bias_en, OUTPUT | MODE0 */
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>;
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};
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am335x_evm_audio_pins: am335x_evm_audio_pins {
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pinctrl-single,pins = <
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rx_dv.mcasp1_aclkx */
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0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_txd3.mcasp1_fsx */
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0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
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>;
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};
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};
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&uart0 {
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@ -373,6 +395,18 @@
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compatible = "ti,tmp275";
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reg = <0x48>;
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};
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tlv320aic3106: tlv320aic3106@1b {
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compatible = "ti,tlv320aic3106";
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reg = <0x1b>;
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status = "okay";
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/* Regulators */
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AVDD-supply = <&vaux2_reg>;
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IOVDD-supply = <&vaux2_reg>;
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DRVDD-supply = <&vaux2_reg>;
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DVDD-supply = <&vbat>;
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};
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};
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&lcdc {
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@ -476,6 +510,22 @@
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#include "tps65910.dtsi"
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&mcasp1 {
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pinctrl-names = "default";
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pinctrl-0 = <&am335x_evm_audio_pins>;
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status = "okay";
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op-mode = <0>; /* MCASP_IIS_MODE */
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tdm-slots = <2>;
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/* 4 serializers */
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serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
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0 0 1 2
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||||
>;
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tx-num-evt = <1>;
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rx-num-evt = <1>;
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};
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&tps {
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vcc1-supply = <&vbat>;
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vcc2-supply = <&vbat>;
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|
|
|
|||
|
|
@ -115,6 +115,17 @@
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brightness-levels = <0 58 61 66 75 90 125 170 255>;
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default-brightness-level = <8>;
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};
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sound {
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compatible = "ti,da830-evm-audio";
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ti,model = "AM335x-EVMSK";
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ti,audio-codec = <&tlv320aic3106>;
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ti,mcasp-controller = <&mcasp1>;
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ti,codec-clock-rate = <24576000>;
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ti,audio-routing =
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"Headphone Jack", "HPLOUT",
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"Headphone Jack", "HPROUT";
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};
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};
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&am33xx_pinmux {
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@ -244,6 +255,15 @@
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0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
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>;
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};
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mcasp1_pins: mcasp1_pins {
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pinctrl-single,pins = <
|
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0x10c (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_crs.mcasp1_aclkx */
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0x110 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* mii1_rxerr.mcasp1_fsx */
|
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0x108 (PIN_OUTPUT_PULLDOWN | MUX_MODE4) /* mii1_col.mcasp1_axr2 */
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0x144 (PIN_INPUT_PULLDOWN | MUX_MODE4) /* rmii1_ref_clk.mcasp1_axr3 */
|
||||
>;
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};
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};
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&uart0 {
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@ -291,6 +311,18 @@
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st,max-limit-y = <550>;
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st,max-limit-z = <750>;
|
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};
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||||
tlv320aic3106: tlv320aic3106@1b {
|
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compatible = "ti,tlv320aic3106";
|
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reg = <0x1b>;
|
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status = "okay";
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||||
|
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/* Regulators */
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AVDD-supply = <&vaux2_reg>;
|
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IOVDD-supply = <&vaux2_reg>;
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DRVDD-supply = <&vaux2_reg>;
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DVDD-supply = <&vbat>;
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};
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};
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&usb {
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||||
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|
@ -433,3 +465,23 @@
|
|||
&aes {
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||||
status = "okay";
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};
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&gpio0 {
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ti,no-reset-on-init;
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};
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&mcasp1 {
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pinctrl-names = "default";
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pinctrl-0 = <&mcasp1_pins>;
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status = "okay";
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op-mode = <0>; /* MCASP_IIS_MODE */
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tdm-slots = <2>;
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/* 4 serializers */
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||||
serial-dir = < /* 0: INACTIVE, 1: TX, 2: RX */
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0 0 1 2
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||||
>;
|
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tx-num-evt = <1>;
|
||||
rx-num-evt = <1>;
|
||||
};
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|
|
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|||
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|
@ -44,6 +44,13 @@
|
|||
regulator-max-microvolt = <5000000>;
|
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regulator-boot-on;
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||||
};
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vmmc: fixedregulator@0 {
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compatible = "regulator-fixed";
|
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regulator-name = "vmmc";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
};
|
||||
};
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||||
|
||||
&am33xx_pinmux {
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||||
|
|
@ -180,6 +187,12 @@
|
|||
};
|
||||
};
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||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmc>;
|
||||
bus-width = <4>;
|
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};
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&uart0 {
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||||
status = "okay";
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pinctrl-names = "default";
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||||
|
|
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|||
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@ -0,0 +1,431 @@
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|||
/*
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* Copyright (C) 2013 Newflow Ltd - http://www.newflow.co.uk/
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "am33xx.dtsi"
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/ {
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model = "Newflow AM335x NanoBone";
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compatible = "ti,am33xx";
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||||
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||||
cpus {
|
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cpu@0 {
|
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cpu0-supply = <&dcdc2_reg>;
|
||||
};
|
||||
};
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|
||||
memory {
|
||||
device_type = "memory";
|
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reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
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leds {
|
||||
compatible = "gpio-leds";
|
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|
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led@0 {
|
||||
label = "nanobone:green:usr1";
|
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gpios = <&gpio1 5 0>;
|
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default-state = "off";
|
||||
};
|
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};
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};
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|
||||
&am33xx_pinmux {
|
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pinctrl-names = "default";
|
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pinctrl-0 = <&misc_pins>;
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misc_pins: misc_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x15c (PIN_OUTPUT | MUX_MODE7) /* spi0_cs0.gpio0_5 */
|
||||
>;
|
||||
};
|
||||
|
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gpmc_pins: gpmc_pins {
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||||
pinctrl-single,pins = <
|
||||
0x0 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad0.gpmc_ad0 */
|
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0x4 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad1.gpmc_ad1 */
|
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0x8 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad2.gpmc_ad2 */
|
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0xc (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad3.gpmc_ad3 */
|
||||
0x10 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad4.gpmc_ad4 */
|
||||
0x14 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad5.gpmc_ad5 */
|
||||
0x18 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad6.gpmc_ad6 */
|
||||
0x1c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad7.gpmc_ad7 */
|
||||
0x20 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad8.gpmc_ad8 */
|
||||
0x24 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad9.gpmc_ad9 */
|
||||
0x28 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad10.gpmc_ad10 */
|
||||
0x2c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad11.gpmc_ad11 */
|
||||
0x30 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad12.gpmc_ad12 */
|
||||
0x34 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad13.gpmc_ad13 */
|
||||
0x38 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad14.gpmc_ad14 */
|
||||
0x3c (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_ad15.gpmc_ad15 */
|
||||
|
||||
0x70 (PIN_INPUT_PULLUP | MUX_MODE0) /* gpmc_wait0.gpmc_wait0 */
|
||||
0x7c (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn0.gpmc_csn0 */
|
||||
0x80 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn1.gpmc_csn1 */
|
||||
0x84 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn2.gpmc_csn2 */
|
||||
0x88 (PIN_OUTPUT | MUX_MODE0) /* gpmc_csn3.gpmc_csn3 */
|
||||
|
||||
0x90 (PIN_OUTPUT | MUX_MODE0) /* gpmc_advn_ale.gpmc_advn_ale */
|
||||
0x94 (PIN_OUTPUT | MUX_MODE0) /* gpmc_oen_ren.gpmc_oen_ren */
|
||||
0x98 (PIN_OUTPUT | MUX_MODE0) /* gpmc_wen.gpmc_wen */
|
||||
0x9c (PIN_OUTPUT | MUX_MODE0) /* gpmc_ben0_cle.gpmc_ben0_cle */
|
||||
|
||||
0xa4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data1.gpmc_a1 */
|
||||
0xa8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data2.gpmc_a2 */
|
||||
0xac (PIN_OUTPUT | MUX_MODE1) /* lcd_data3.gpmc_a3 */
|
||||
0xb0 (PIN_OUTPUT | MUX_MODE1) /* lcd_data4.gpmc_a4 */
|
||||
0xb4 (PIN_OUTPUT | MUX_MODE1) /* lcd_data5.gpmc_a5 */
|
||||
0xb8 (PIN_OUTPUT | MUX_MODE1) /* lcd_data6.gpmc_a6 */
|
||||
0xbc (PIN_OUTPUT | MUX_MODE1) /* lcd_data7.gpmc_a7 */
|
||||
|
||||
0xe0 (PIN_OUTPUT | MUX_MODE1) /* lcd_vsync.gpmc_a8 */
|
||||
0xe4 (PIN_OUTPUT | MUX_MODE1) /* lcd_hsync.gpmc_a9 */
|
||||
0xe8 (PIN_OUTPUT | MUX_MODE1) /* lcd_pclk.gpmc_a10 */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLDOWN | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
|
||||
uart0_pins: uart0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x170 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart0_rxd.uart0_rxd */
|
||||
0x174 (PIN_OUTPUT | MUX_MODE0) /* uart0_txd.uart0_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart1_pins: uart1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x178 (PIN_OUTPUT | MUX_MODE7) /* uart1_ctsn.uart1_ctsn */
|
||||
0x17c (PIN_OUTPUT | MUX_MODE7) /* uart1_rtsn.uart1_rtsn */
|
||||
0x180 (PIN_INPUT_PULLUP | MUX_MODE0) /* uart1_rxd.uart1_rxd */
|
||||
0x184 (PIN_OUTPUT | MUX_MODE0) /* uart1_txd.uart1_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart2_pins: uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc0 (PIN_INPUT_PULLUP | MUX_MODE7) /* lcd_data8.gpio2[14] */
|
||||
0xc4 (PIN_OUTPUT | MUX_MODE7) /* lcd_data9.gpio2[15] */
|
||||
0x150 (PIN_INPUT | MUX_MODE1) /* spi0_sclk.uart2_rxd */
|
||||
0x154 (PIN_OUTPUT | MUX_MODE1) /* spi0_d0.uart2_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xc8 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data10.uart3_ctsn */
|
||||
0xcc (PIN_OUTPUT | MUX_MODE6) /* lcd_data11.uart3_rtsn */
|
||||
0x160 (PIN_INPUT | MUX_MODE1) /* spi0_cs1.uart3_rxd */
|
||||
0x164 (PIN_OUTPUT | MUX_MODE1) /* ecap0_in_pwm0_out.uart3_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart4_pins: uart4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd0 (PIN_INPUT_PULLUP | MUX_MODE6) /* lcd_data12.uart4_ctsn */
|
||||
0xd4 (PIN_OUTPUT | MUX_MODE6) /* lcd_data13.uart4_rtsn */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* uart0_ctsn.uart4_rxd */
|
||||
0x16c (PIN_OUTPUT | MUX_MODE1) /* uart0_rtsn.uart4_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
uart5_pins: uart5_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xd8 (PIN_INPUT | MUX_MODE4) /* lcd_data14.uart5_rxd */
|
||||
0x144 (PIN_OUTPUT | MUX_MODE3) /* rmiii1_refclk.uart5_txd */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0xf0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat0.mmc0_dat0 */
|
||||
0xf4 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat1.mmc0_dat1 */
|
||||
0xf8 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat2.mmc0_dat2 */
|
||||
0xfc (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_dat3.mmc0_dat3 */
|
||||
0x100 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_clk.mmc0_clk */
|
||||
0x104 (PIN_INPUT_PULLUP | MUX_MODE0) /* mmc0_cmd.mmc0_cmd */
|
||||
0x1e8 (PIN_INPUT_PULLUP | MUX_MODE7) /* emu1.gpio3[8] */
|
||||
0x1a0 (PIN_INPUT_PULLUP | MUX_MODE7) /* mcasp0_aclkr.gpio3[18] */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&uart0 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart0_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart1_pins>;
|
||||
status = "okay";
|
||||
rts-gpio = <&gpio0 13 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rx-during-tx;
|
||||
rs485-rts-delay = <1 1>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
status = "okay";
|
||||
rts-gpio = <&gpio2 15 GPIO_ACTIVE_HIGH>;
|
||||
rs485-rts-active-high;
|
||||
rs485-rts-delay = <1 1>;
|
||||
linux,rs485-enabled-at-boot-time;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart4 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart4_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&uart5 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5_pins>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
gpio@20 {
|
||||
compatible = "mcp,mcp23017";
|
||||
reg = <0x20>;
|
||||
};
|
||||
|
||||
tps: tps@24 {
|
||||
reg = <0x24>;
|
||||
};
|
||||
|
||||
eeprom@53 {
|
||||
compatible = "mcp,24c02";
|
||||
reg = <0x53>;
|
||||
pagesize = <8>;
|
||||
};
|
||||
|
||||
rtc@68 {
|
||||
compatible = "dallas,ds1307";
|
||||
reg = <0x68>;
|
||||
};
|
||||
};
|
||||
|
||||
&elm {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
compatible = "ti,am3352-gpmc";
|
||||
ti,hwmods = "gpmc";
|
||||
status = "okay";
|
||||
gpmc,num-waitpins = <2>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&gpmc_pins>;
|
||||
|
||||
#address-cells = <2>;
|
||||
#size-cells = <1>;
|
||||
ranges = <0 0 0x08000000 0x08000000>; /* CS0: NOR 128M */
|
||||
|
||||
nor@0,0 {
|
||||
reg = <0 0x00000000 0x08000000>;
|
||||
compatible = "cfi-flash";
|
||||
linux,mtd-name = "spansion,s29gl010p11t";
|
||||
bank-width = <2>;
|
||||
|
||||
gpmc,mux-add-data = <2>;
|
||||
|
||||
gpmc,sync-clk-ps = <0>;
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <160>;
|
||||
gpmc,cs-wr-off-ns = <160>;
|
||||
gpmc,adv-on-ns = <10>;
|
||||
gpmc,adv-rd-off-ns = <30>;
|
||||
gpmc,adv-wr-off-ns = <30>;
|
||||
gpmc,oe-on-ns = <40>;
|
||||
gpmc,oe-off-ns = <160>;
|
||||
gpmc,we-on-ns = <40>;
|
||||
gpmc,we-off-ns = <160>;
|
||||
gpmc,rd-cycle-ns = <160>;
|
||||
gpmc,wr-cycle-ns = <160>;
|
||||
gpmc,access-ns = <150>;
|
||||
gpmc,page-burst-access-ns = <10>;
|
||||
gpmc,cycle2cycle-samecsen;
|
||||
gpmc,cycle2cycle-delay-ns = <20>;
|
||||
gpmc,wr-data-mux-bus-ns = <70>;
|
||||
gpmc,wr-access-ns = <80>;
|
||||
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
/*
|
||||
MTD partition table
|
||||
===================
|
||||
+------------+-->0x00000000-> U-Boot start
|
||||
| |
|
||||
| |-->0x000BFFFF-> U-Boot end
|
||||
| |-->0x000C0000-> ENV1 start
|
||||
| |
|
||||
| |-->0x000DFFFF-> ENV1 end
|
||||
| |-->0x000E0000-> ENV2 start
|
||||
| |
|
||||
| |-->0x000FFFFF-> ENV2 end
|
||||
| |-->0x00100000-> Kernel start
|
||||
| |
|
||||
| |-->0x004FFFFF-> Kernel end
|
||||
| |-->0x00500000-> File system start
|
||||
| |
|
||||
| |-->0x014FFFFF-> File system end
|
||||
| |-->0x01500000-> User data start
|
||||
| |
|
||||
| |-->0x03FFFFFF-> User data end
|
||||
| |-->0x04000000-> Data storage start
|
||||
| |
|
||||
+------------+-->0x08000000-> NOR end (Free end)
|
||||
*/
|
||||
partition@0 {
|
||||
label = "boot";
|
||||
reg = <0x00000000 0x000c0000>; /* 768KB */
|
||||
};
|
||||
|
||||
partition@1 {
|
||||
label = "env1";
|
||||
reg = <0x000c0000 0x00020000>; /* 128KB */
|
||||
};
|
||||
|
||||
partition@2 {
|
||||
label = "env2";
|
||||
reg = <0x000e0000 0x00020000>; /* 128KB */
|
||||
};
|
||||
|
||||
partition@3 {
|
||||
label = "kernel";
|
||||
reg = <0x00100000 0x00400000>; /* 4MB */
|
||||
};
|
||||
|
||||
partition@4 {
|
||||
label = "rootfs";
|
||||
reg = <0x00500000 0x01000000>; /* 16MB */
|
||||
};
|
||||
|
||||
partition@5 {
|
||||
label = "user";
|
||||
reg = <0x01500000 0x02b00000>; /* 43MB */
|
||||
};
|
||||
|
||||
partition@6 {
|
||||
label = "data";
|
||||
reg = <0x04000000 0x04000000>; /* 64MB */
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mac {
|
||||
dual_emac = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <0>;
|
||||
dual_emac_res_vlan = <1>;
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
dual_emac_res_vlan = <2>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&ldo4_reg>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio3 8 0>;
|
||||
wp-gpios = <&gpio3 18 0>;
|
||||
};
|
||||
|
||||
#include "tps65217.dtsi"
|
||||
|
||||
&tps {
|
||||
regulators {
|
||||
dcdc1_reg: regulator@0 {
|
||||
/* +1.5V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1450000>;
|
||||
regulator-max-microvolt = <1550000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc2_reg: regulator@1 {
|
||||
/* VDD_MPU voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_mpu";
|
||||
regulator-min-microvolt = <915000>;
|
||||
regulator-max-microvolt = <1140000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
dcdc3_reg: regulator@2 {
|
||||
/* VDD_CORE voltage limits 0.95V - 1.1V with ±4% tolerance */
|
||||
regulator-name = "vdd_core";
|
||||
regulator-min-microvolt = <915000>;
|
||||
regulator-max-microvolt = <1140000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo1_reg: regulator@3 {
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo2_reg: regulator@4 {
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo3_reg: regulator@5 {
|
||||
/* +1.8V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <1750000>;
|
||||
regulator-max-microvolt = <1870000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
ldo4_reg: regulator@6 {
|
||||
/* +3.3V voltage with ±4% tolerance */
|
||||
regulator-min-microvolt = <3175000>;
|
||||
regulator-max-microvolt = <3430000>;
|
||||
regulator-boot-on;
|
||||
regulator-always-on;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -18,6 +18,9 @@
|
|||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
serial0 = &uart0;
|
||||
serial1 = &uart1;
|
||||
serial2 = &uart2;
|
||||
|
|
@ -413,7 +416,7 @@
|
|||
ti,hwmods = "usb_otg_hs";
|
||||
status = "disabled";
|
||||
|
||||
ctrl_mod: control@44e10000 {
|
||||
usb_ctrl_mod: control@44e10000 {
|
||||
compatible = "ti,am335x-usb-ctrl-module";
|
||||
reg = <0x44e10620 0x10
|
||||
0x44e10648 0x4>;
|
||||
|
|
@ -426,7 +429,7 @@
|
|||
reg = <0x47401300 0x100>;
|
||||
reg-names = "phy";
|
||||
status = "disabled";
|
||||
ti,ctrl_mod = <&ctrl_mod>;
|
||||
ti,ctrl_mod = <&usb_ctrl_mod>;
|
||||
};
|
||||
|
||||
usb0: usb@47401000 {
|
||||
|
|
@ -474,7 +477,7 @@
|
|||
reg = <0x47401b00 0x100>;
|
||||
reg-names = "phy";
|
||||
status = "disabled";
|
||||
ti,ctrl_mod = <&ctrl_mod>;
|
||||
ti,ctrl_mod = <&usb_ctrl_mod>;
|
||||
};
|
||||
|
||||
usb1: usb@47401800 {
|
||||
|
|
@ -674,6 +677,7 @@
|
|||
reg = <0x44d00000 0x4000 /* M3 UMEM */
|
||||
0x44d80000 0x2000>; /* M3 DMEM */
|
||||
ti,hwmods = "wkup_m3";
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
||||
elm: elm@48080000 {
|
||||
|
|
@ -713,6 +717,7 @@
|
|||
gpmc: gpmc@50000000 {
|
||||
compatible = "ti,am3352-gpmc";
|
||||
ti,hwmods = "gpmc";
|
||||
ti,no-idle-on-init;
|
||||
reg = <0x50000000 0x2000>;
|
||||
interrupts = <100>;
|
||||
gpmc,num-cs = <7>;
|
||||
|
|
@ -740,5 +745,33 @@
|
|||
<&edma 5>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mcasp0: mcasp@48038000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
ti,hwmods = "mcasp0";
|
||||
reg = <0x48038000 0x2000>,
|
||||
<0x46000000 0x400000>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <80>, <81>;
|
||||
interrupts-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
dmas = <&edma 8>,
|
||||
<&edma 9>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mcasp1: mcasp@4803C000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
ti,hwmods = "mcasp1";
|
||||
reg = <0x4803C000 0x2000>,
|
||||
<0x46400000 0x400000>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <82>, <83>;
|
||||
interrupts-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
dmas = <&edma 10>,
|
||||
<&edma 11>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -18,7 +18,12 @@
|
|||
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c0;
|
||||
i2c1 = &i2c1;
|
||||
i2c2 = &i2c2;
|
||||
serial0 = &uart0;
|
||||
ethernet0 = &cpsw_emac0;
|
||||
ethernet1 = &cpsw_emac1;
|
||||
};
|
||||
|
||||
cpus {
|
||||
|
|
@ -39,11 +44,42 @@
|
|||
<0x48240100 0x0100>;
|
||||
};
|
||||
|
||||
l2-cache-controller@48242000 {
|
||||
compatible = "arm,pl310-cache";
|
||||
reg = <0x48242000 0x1000>;
|
||||
cache-unified;
|
||||
cache-level = <2>;
|
||||
};
|
||||
|
||||
am43xx_pinmux: pinmux@44e10800 {
|
||||
compatible = "pinctrl-single";
|
||||
reg = <0x44e10800 0x31c>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
pinctrl-single,register-width = <32>;
|
||||
pinctrl-single,function-mask = <0xffffffff>;
|
||||
};
|
||||
|
||||
ocp {
|
||||
compatible = "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "l3_main";
|
||||
|
||||
edma: edma@49000000 {
|
||||
compatible = "ti,edma3";
|
||||
ti,hwmods = "tpcc", "tptc0", "tptc1", "tptc2";
|
||||
reg = <0x49000000 0x10000>,
|
||||
<0x44e10f90 0x10>;
|
||||
interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
|
||||
<GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#dma-cells = <1>;
|
||||
dma-channels = <64>;
|
||||
ti,edma-regions = <4>;
|
||||
ti,edma-slots = <256>;
|
||||
};
|
||||
|
||||
uart0: serial@44e09000 {
|
||||
compatible = "ti,am4372-uart","ti,omap2-uart";
|
||||
|
|
@ -92,6 +128,18 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mailbox: mailbox@480C8000 {
|
||||
compatible = "ti,omap4-mailbox";
|
||||
reg = <0x480C8000 0x200>;
|
||||
interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "mailbox";
|
||||
ti,mbox-num-users = <4>;
|
||||
ti,mbox-num-fifos = <8>;
|
||||
ti,mbox-names = "wkup_m3";
|
||||
ti,mbox-data = <0 0 0 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
timer1: timer@44e31000 {
|
||||
compatible = "ti,am4372-timer-1ms","ti,am335x-timer-1ms";
|
||||
reg = <0x44e31000 0x400>;
|
||||
|
|
@ -203,7 +251,6 @@
|
|||
reg = <0x44e35000 0x1000>;
|
||||
interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "wd_timer2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
gpio0: gpio@44e07000 {
|
||||
|
|
@ -318,6 +365,40 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc1: mmc@48060000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x48060000 0x1000>;
|
||||
ti,hwmods = "mmc1";
|
||||
ti,dual-volt;
|
||||
ti,needs-special-reset;
|
||||
dmas = <&edma 24
|
||||
&edma 25>;
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc2: mmc@481d8000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x481d8000 0x1000>;
|
||||
ti,hwmods = "mmc2";
|
||||
ti,needs-special-reset;
|
||||
dmas = <&edma 2
|
||||
&edma 3>;
|
||||
dma-names = "tx", "rx";
|
||||
interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
mmc3: mmc@47810000 {
|
||||
compatible = "ti,omap4-hsmmc";
|
||||
reg = <0x47810000 0x1000>;
|
||||
ti,hwmods = "mmc3";
|
||||
ti,needs-special-reset;
|
||||
interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: spi@481a0000 {
|
||||
compatible = "ti,am4372-mcspi","ti,omap4-mcspi";
|
||||
reg = <0x481a0000 0x400>;
|
||||
|
|
@ -366,50 +447,173 @@
|
|||
GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH
|
||||
GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ti,hwmods = "cpgmac0";
|
||||
status = "disabled";
|
||||
cpdma_channels = <8>;
|
||||
ale_entries = <1024>;
|
||||
bd_ram_size = <0x2000>;
|
||||
no_bd_ram = <0>;
|
||||
rx_descs = <64>;
|
||||
mac_control = <0x20>;
|
||||
slaves = <2>;
|
||||
active_slave = <0>;
|
||||
cpts_clock_mult = <0x80000000>;
|
||||
cpts_clock_shift = <29>;
|
||||
ranges;
|
||||
|
||||
davinci_mdio: mdio@4a101000 {
|
||||
compatible = "ti,am4372-mdio","ti,davinci_mdio";
|
||||
reg = <0x4a101000 0x100>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "davinci_mdio";
|
||||
bus_freq = <1000000>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
cpsw_emac0: slave@4a100200 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
|
||||
cpsw_emac1: slave@4a100300 {
|
||||
/* Filled in by U-Boot */
|
||||
mac-address = [ 00 00 00 00 00 00 ];
|
||||
};
|
||||
};
|
||||
|
||||
epwmss0: epwmss@48300000 {
|
||||
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
||||
reg = <0x48300000 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "epwmss0";
|
||||
status = "disabled";
|
||||
|
||||
ecap0: ecap@48300100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
reg = <0x48300100 0x80>;
|
||||
ti,hwmods = "ecap0";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm0: ehrpwm@48300200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
reg = <0x48300200 0x80>;
|
||||
ti,hwmods = "ehrpwm0";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
epwmss1: epwmss@48302000 {
|
||||
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
||||
reg = <0x48302000 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "epwmss1";
|
||||
status = "disabled";
|
||||
|
||||
ecap1: ecap@48302100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
reg = <0x48302100 0x80>;
|
||||
ti,hwmods = "ecap1";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm1: ehrpwm@48302200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
reg = <0x48302200 0x80>;
|
||||
ti,hwmods = "ehrpwm1";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
epwmss2: epwmss@48304000 {
|
||||
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
||||
reg = <0x48304000 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "epwmss2";
|
||||
status = "disabled";
|
||||
|
||||
ecap2: ecap@48304100 {
|
||||
compatible = "ti,am4372-ecap","ti,am33xx-ecap";
|
||||
reg = <0x48304100 0x80>;
|
||||
ti,hwmods = "ecap2";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ehrpwm2: ehrpwm@48304200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
reg = <0x48304200 0x80>;
|
||||
ti,hwmods = "ehrpwm2";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
epwmss3: epwmss@48306000 {
|
||||
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
||||
reg = <0x48306000 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "epwmss3";
|
||||
status = "disabled";
|
||||
|
||||
ehrpwm3: ehrpwm@48306200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
reg = <0x48306200 0x80>;
|
||||
ti,hwmods = "ehrpwm3";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
epwmss4: epwmss@48308000 {
|
||||
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
||||
reg = <0x48308000 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "epwmss4";
|
||||
status = "disabled";
|
||||
|
||||
ehrpwm4: ehrpwm@48308200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
reg = <0x48308200 0x80>;
|
||||
ti,hwmods = "ehrpwm4";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
epwmss5: epwmss@4830a000 {
|
||||
compatible = "ti,am4372-pwmss","ti,am33xx-pwmss";
|
||||
reg = <0x4830a000 0x10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
ti,hwmods = "epwmss5";
|
||||
status = "disabled";
|
||||
|
||||
ehrpwm5: ehrpwm@4830a200 {
|
||||
compatible = "ti,am4372-ehrpwm","ti,am33xx-ehrpwm";
|
||||
reg = <0x4830a200 0x80>;
|
||||
ti,hwmods = "ehrpwm5";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
sham: sham@53100000 {
|
||||
compatible = "ti,omap5-sham";
|
||||
ti,hwmods = "sham";
|
||||
reg = <0x53100000 0x300>;
|
||||
dmas = <&edma 36>;
|
||||
dma-names = "rx";
|
||||
interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
|
||||
};
|
||||
|
||||
aes: aes@53501000 {
|
||||
|
|
@ -417,6 +621,9 @@
|
|||
ti,hwmods = "aes";
|
||||
reg = <0x53501000 0xa0>;
|
||||
interrupts = <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&edma 6
|
||||
&edma 5>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
des: des@53701000 {
|
||||
|
|
@ -424,6 +631,37 @@
|
|||
ti,hwmods = "des";
|
||||
reg = <0x53701000 0xa0>;
|
||||
interrupts = <GIC_SPI 130 IRQ_TYPE_LEVEL_HIGH>;
|
||||
dmas = <&edma 34
|
||||
&edma 33>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mcasp0: mcasp@48038000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
ti,hwmods = "mcasp0";
|
||||
reg = <0x48038000 0x2000>,
|
||||
<0x46000000 0x400000>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <80>, <81>;
|
||||
interrupts-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
dmas = <&edma 8>,
|
||||
<&edma 9>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
|
||||
mcasp1: mcasp@4803C000 {
|
||||
compatible = "ti,am33xx-mcasp-audio";
|
||||
ti,hwmods = "mcasp1";
|
||||
reg = <0x4803C000 0x2000>,
|
||||
<0x46400000 0x400000>;
|
||||
reg-names = "mpu", "dat";
|
||||
interrupts = <82>, <83>;
|
||||
interrupts-names = "tx", "rx";
|
||||
status = "disabled";
|
||||
dmas = <&edma 10>,
|
||||
<&edma 11>;
|
||||
dma-names = "tx", "rx";
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -11,8 +11,176 @@
|
|||
/dts-v1/;
|
||||
|
||||
#include "am4372.dtsi"
|
||||
#include <dt-bindings/pinctrl/am43xx.h>
|
||||
#include <dt-bindings/gpio/gpio.h>
|
||||
|
||||
/ {
|
||||
model = "TI AM43x EPOS EVM";
|
||||
compatible = "ti,am43x-epos-evm","ti,am4372","ti,am43";
|
||||
|
||||
vmmcsd_fixed: fixedregulator-sd {
|
||||
compatible = "regulator-fixed";
|
||||
regulator-name = "vmmcsd_fixed";
|
||||
regulator-min-microvolt = <3300000>;
|
||||
regulator-max-microvolt = <3300000>;
|
||||
enable-active-high;
|
||||
};
|
||||
|
||||
am43xx_pinmux: pinmux@44e10800 {
|
||||
cpsw_default: cpsw_default {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_crs.rmii1_crs */
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxerr.rmii1_rxerr */
|
||||
0x114 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txen.rmii1_txen */
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxdv.rmii1_rxdv */
|
||||
0x124 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd1.rmii1_txd1 */
|
||||
0x128 (PIN_OUTPUT_PULLDOWN | MUX_MODE1) /* mii1_txd0.rmii1_txd0 */
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd1.rmii1_rxd1 */
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE1) /* mii1_rxd0.rmii1_rxd0 */
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii1_refclk.rmii1_refclk */
|
||||
>;
|
||||
};
|
||||
|
||||
cpsw_sleep: cpsw_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* Slave 1 reset value */
|
||||
0x10c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x110 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x114 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x118 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x124 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x128 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x13c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x140 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x144 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_default: davinci_mdio_default {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO */
|
||||
0x148 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* mdio_data.mdio_data */
|
||||
0x14c (PIN_OUTPUT_PULLUP | MUX_MODE0) /* mdio_clk.mdio_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
davinci_mdio_sleep: davinci_mdio_sleep {
|
||||
pinctrl-single,pins = <
|
||||
/* MDIO reset value */
|
||||
0x148 (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
0x14c (PIN_INPUT_PULLDOWN | MUX_MODE7)
|
||||
>;
|
||||
};
|
||||
|
||||
i2c0_pins: pinmux_i2c0_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x188 (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_sda.i2c0_sda */
|
||||
0x18c (PIN_INPUT_PULLUP | SLEWCTRL_FAST | MUX_MODE0) /* i2c0_scl.i2c0_scl */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
matrix_keypad: matrix_keypad@0 {
|
||||
compatible = "gpio-matrix-keypad";
|
||||
debounce-delay-ms = <5>;
|
||||
col-scan-delay-us = <2>;
|
||||
|
||||
row-gpios = <&gpio0 12 GPIO_ACTIVE_HIGH /* Bank0, pin12 */
|
||||
&gpio0 13 GPIO_ACTIVE_HIGH /* Bank0, pin13 */
|
||||
&gpio0 14 GPIO_ACTIVE_HIGH /* Bank0, pin14 */
|
||||
&gpio0 15 GPIO_ACTIVE_HIGH>; /* Bank0, pin15 */
|
||||
|
||||
col-gpios = <&gpio3 9 GPIO_ACTIVE_HIGH /* Bank3, pin9 */
|
||||
&gpio3 10 GPIO_ACTIVE_HIGH /* Bank3, pin10 */
|
||||
&gpio2 18 GPIO_ACTIVE_HIGH /* Bank2, pin18 */
|
||||
&gpio2 19 GPIO_ACTIVE_HIGH>; /* Bank2, pin19 */
|
||||
|
||||
linux,keymap = <0x00000201 /* P1 */
|
||||
0x01000204 /* P4 */
|
||||
0x02000207 /* P7 */
|
||||
0x0300020a /* NUMERIC_STAR */
|
||||
0x00010202 /* P2 */
|
||||
0x01010205 /* P5 */
|
||||
0x02010208 /* P8 */
|
||||
0x03010200 /* P0 */
|
||||
0x00020203 /* P3 */
|
||||
0x01020206 /* P6 */
|
||||
0x02020209 /* P9 */
|
||||
0x0302020b /* NUMERIC_POUND */
|
||||
0x00030067 /* UP */
|
||||
0x0103006a /* RIGHT */
|
||||
0x0203006c /* DOWN */
|
||||
0x03030069>; /* LEFT */
|
||||
};
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "okay";
|
||||
vmmc-supply = <&vmmcsd_fixed>;
|
||||
bus-width = <4>;
|
||||
};
|
||||
|
||||
&mac {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&cpsw_default>;
|
||||
pinctrl-1 = <&cpsw_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&davinci_mdio {
|
||||
pinctrl-names = "default", "sleep";
|
||||
pinctrl-0 = <&davinci_mdio_default>;
|
||||
pinctrl-1 = <&davinci_mdio_sleep>;
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&cpsw_emac0 {
|
||||
phy_id = <&davinci_mdio>, <16>;
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&cpsw_emac1 {
|
||||
phy_id = <&davinci_mdio>, <1>;
|
||||
phy-mode = "rmii";
|
||||
};
|
||||
|
||||
&i2c0 {
|
||||
status = "okay";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c0_pins>;
|
||||
|
||||
at24@50 {
|
||||
compatible = "at24,24c256";
|
||||
pagesize = <64>;
|
||||
reg = <0x50>;
|
||||
};
|
||||
|
||||
pixcir_ts@5c {
|
||||
compatible = "pixcir,pixcir_ts";
|
||||
reg = <0x5c>;
|
||||
interrupt-parent = <&gpio1>;
|
||||
interrupts = <17 0>;
|
||||
|
||||
attb-gpio = <&gpio1 17 GPIO_ACTIVE_HIGH>;
|
||||
|
||||
x-size = <1024>;
|
||||
y-size = <768>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio0 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio2 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
&gpio3 {
|
||||
status = "okay";
|
||||
};
|
||||
|
|
|
|||
|
|
@ -269,3 +269,7 @@
|
|||
vmmc-supply = <&mmc2_3v3>;
|
||||
bus-width = <8>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps123_reg>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -20,6 +20,11 @@
|
|||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
i2c1 = &i2c2;
|
||||
i2c2 = &i2c3;
|
||||
i2c3 = &i2c4;
|
||||
i2c4 = &i2c5;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
@ -32,10 +37,16 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0>;
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
1000000 1060000
|
||||
1176000 1160000
|
||||
>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
|
|
|
|||
|
|
@ -173,6 +173,8 @@
|
|||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -131,6 +131,8 @@
|
|||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
mode = <3>;
|
||||
power = <50>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -26,9 +26,116 @@
|
|||
reg = <0x80000000 0x10000000>; /* 256 MB */
|
||||
};
|
||||
|
||||
gpio_keys {
|
||||
compatible = "gpio-keys";
|
||||
|
||||
camera_lens_cover {
|
||||
label = "Camera Lens Cover";
|
||||
gpios = <&gpio4 14 GPIO_ACTIVE_LOW>; /* 110 */
|
||||
linux,input-type = <5>; /* EV_SW */
|
||||
linux,code = <0x09>; /* SW_CAMERA_LENS_COVER */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
camera_focus {
|
||||
label = "Camera Focus";
|
||||
gpios = <&gpio3 4 GPIO_ACTIVE_LOW>; /* 68 */
|
||||
linux,code = <0x210>; /* KEY_CAMERA_FOCUS */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
camera_capture {
|
||||
label = "Camera Capture";
|
||||
gpios = <&gpio3 5 GPIO_ACTIVE_LOW>; /* 69 */
|
||||
linux,code = <0xd4>; /* KEY_CAMERA */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
lock_button {
|
||||
label = "Lock Button";
|
||||
gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; /* 113 */
|
||||
linux,code = <0x98>; /* KEY_SCREENLOCK */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
keypad_slide {
|
||||
label = "Keypad Slide";
|
||||
gpios = <&gpio3 7 GPIO_ACTIVE_LOW>; /* 71 */
|
||||
linux,input-type = <5>; /* EV_SW */
|
||||
linux,code = <0x0a>; /* SW_KEYPAD_SLIDE */
|
||||
gpio-key,wakeup;
|
||||
};
|
||||
|
||||
proximity_sensor {
|
||||
label = "Proximity Sensor";
|
||||
gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>; /* 89 */
|
||||
linux,input-type = <5>; /* EV_SW */
|
||||
linux,code = <0x0b>; /* SW_FRONT_PROXIMITY */
|
||||
};
|
||||
};
|
||||
|
||||
};
|
||||
|
||||
&omap3_pmx_core {
|
||||
pinctrl-names = "default";
|
||||
|
||||
uart2_pins: pinmux_uart2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14a (PIN_INPUT | MUX_MODE0) /* uart2_rx */
|
||||
0x148 (PIN_OUTPUT | MUX_MODE0) /* uart2_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
uart3_pins: pinmux_uart3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x16e (PIN_INPUT | MUX_MODE0) /* uart3_rx */
|
||||
0x170 (PIN_OUTPUT | MUX_MODE0) /* uart3_tx */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c1_pins: pinmux_i2c1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_scl */
|
||||
0x18c (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c1_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c2_pins: pinmux_i2c2_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18e (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */
|
||||
0x190 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
i2c3_pins: pinmux_i2c3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x192 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */
|
||||
0x194 (PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc1_pins: pinmux_mmc1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x114 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk */
|
||||
0x116 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd */
|
||||
0x118 (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0 */
|
||||
0x11a (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1 */
|
||||
0x11c (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2 */
|
||||
0x11e (PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
display_pins: pinmux_display_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x0d4 (PIN_OUTPUT | MUX_MODE4) /* RX51_LCD_RESET_GPIO */
|
||||
>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c1 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c1_pins>;
|
||||
|
||||
clock-frequency = <2200000>;
|
||||
|
||||
twl: twl@48 {
|
||||
|
|
@ -39,6 +146,98 @@
|
|||
};
|
||||
|
||||
#include "twl4030.dtsi"
|
||||
#include "twl4030_omap3.dtsi"
|
||||
|
||||
&vaux1 {
|
||||
regulator-name = "V28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
regulator-always-on; /* due battery cover sensor */
|
||||
};
|
||||
|
||||
&vaux2 {
|
||||
regulator-name = "VCSI";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&vaux3 {
|
||||
regulator-name = "VMMC2_30";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
};
|
||||
|
||||
&vaux4 {
|
||||
regulator-name = "VCAM_ANA_28";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <2800000>;
|
||||
};
|
||||
|
||||
&vmmc1 {
|
||||
regulator-name = "VMMC1";
|
||||
regulator-min-microvolt = <1850000>;
|
||||
regulator-max-microvolt = <3150000>;
|
||||
};
|
||||
|
||||
&vmmc2 {
|
||||
regulator-name = "V28_A";
|
||||
regulator-min-microvolt = <2800000>;
|
||||
regulator-max-microvolt = <3000000>;
|
||||
regulator-always-on; /* due VIO leak to AIC34 VDDs */
|
||||
};
|
||||
|
||||
&vpll1 {
|
||||
regulator-name = "VPLL";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vpll2 {
|
||||
regulator-name = "VSDI_CSI";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vsim {
|
||||
regulator-name = "VMMC2_IO_18";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
&vio {
|
||||
regulator-name = "VIO";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
|
||||
};
|
||||
|
||||
&vintana1 {
|
||||
regulator-name = "VINTANA1";
|
||||
/* fixed to 1500000 */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vintana2 {
|
||||
regulator-name = "VINTANA2";
|
||||
regulator-min-microvolt = <2750000>;
|
||||
regulator-max-microvolt = <2750000>;
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&vintdig {
|
||||
regulator-name = "VINTDIG";
|
||||
/* fixed to 1500000 */
|
||||
regulator-always-on;
|
||||
};
|
||||
|
||||
&twl {
|
||||
twl_audio: audio {
|
||||
compatible = "ti,twl4030-audio";
|
||||
ti,enable-vibra = <1>;
|
||||
};
|
||||
};
|
||||
|
||||
&twl_gpio {
|
||||
ti,pullups = <0x0>;
|
||||
|
|
@ -46,15 +245,117 @@
|
|||
};
|
||||
|
||||
&i2c2 {
|
||||
clock-frequency = <400000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c2_pins>;
|
||||
|
||||
clock-frequency = <100000>;
|
||||
|
||||
tlv320aic3x: tlv320aic3x@18 {
|
||||
compatible = "ti,tlv320aic3x";
|
||||
reg = <0x18>;
|
||||
gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
|
||||
ai3x-gpio-func = <
|
||||
0 /* AIC3X_GPIO1_FUNC_DISABLED */
|
||||
5 /* AIC3X_GPIO2_FUNC_DIGITAL_MIC_INPUT */
|
||||
>;
|
||||
|
||||
AVDD-supply = <&vmmc2>;
|
||||
DRVDD-supply = <&vmmc2>;
|
||||
IOVDD-supply = <&vio>;
|
||||
DVDD-supply = <&vio>;
|
||||
};
|
||||
|
||||
tlv320aic3x_aux: tlv320aic3x@19 {
|
||||
compatible = "ti,tlv320aic3x";
|
||||
reg = <0x19>;
|
||||
gpio-reset = <&gpio2 28 GPIO_ACTIVE_HIGH>; /* 60 */
|
||||
|
||||
AVDD-supply = <&vmmc2>;
|
||||
DRVDD-supply = <&vmmc2>;
|
||||
IOVDD-supply = <&vio>;
|
||||
DVDD-supply = <&vio>;
|
||||
};
|
||||
|
||||
lp5523: lp5523@32 {
|
||||
compatible = "national,lp5523";
|
||||
reg = <0x32>;
|
||||
clock-mode = /bits/ 8 <0>; /* LP55XX_CLOCK_AUTO */
|
||||
enable-gpio = <&gpio2 9 GPIO_ACTIVE_HIGH>; /* 41 */
|
||||
|
||||
chan0 {
|
||||
chan-name = "lp5523:kb1";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan1 {
|
||||
chan-name = "lp5523:kb2";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan2 {
|
||||
chan-name = "lp5523:kb3";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan3 {
|
||||
chan-name = "lp5523:kb4";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan4 {
|
||||
chan-name = "lp5523:b";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan5 {
|
||||
chan-name = "lp5523:g";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan6 {
|
||||
chan-name = "lp5523:r";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan7 {
|
||||
chan-name = "lp5523:kb5";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
|
||||
chan8 {
|
||||
chan-name = "lp5523:kb6";
|
||||
led-cur = /bits/ 8 <50>;
|
||||
max-cur = /bits/ 8 <100>;
|
||||
};
|
||||
};
|
||||
|
||||
bq27200: bq27200@55 {
|
||||
compatible = "ti,bq27200";
|
||||
reg = <0x55>;
|
||||
};
|
||||
};
|
||||
|
||||
&i2c3 {
|
||||
clock-frequency = <100000>;
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&i2c3_pins>;
|
||||
|
||||
clock-frequency = <400000>;
|
||||
};
|
||||
|
||||
&mmc1 {
|
||||
status = "disabled";
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&mmc1_pins>;
|
||||
vmmc-supply = <&vmmc1>;
|
||||
bus-width = <4>;
|
||||
cd-gpios = <&gpio6 0 GPIO_ACTIVE_HIGH>; /* 160 */
|
||||
};
|
||||
|
||||
&mmc2 {
|
||||
|
|
@ -65,6 +366,78 @@
|
|||
status = "disabled";
|
||||
};
|
||||
|
||||
&gpmc {
|
||||
ranges = <0 0 0x04000000 0x10000000>; /* 256MB */
|
||||
|
||||
/* gpio-irq for dma: 65 */
|
||||
|
||||
onenand@0,0 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0 0 0x10000000>;
|
||||
|
||||
gpmc,sync-read;
|
||||
gpmc,sync-write;
|
||||
gpmc,burst-length = <16>;
|
||||
gpmc,burst-read;
|
||||
gpmc,burst-wrap;
|
||||
gpmc,burst-write;
|
||||
gpmc,device-width = <2>; /* GPMC_DEVWIDTH_16BIT */
|
||||
gpmc,mux-add-data = <2>; /* GPMC_MUX_AD */
|
||||
gpmc,cs-on-ns = <0>;
|
||||
gpmc,cs-rd-off-ns = <87>;
|
||||
gpmc,cs-wr-off-ns = <87>;
|
||||
gpmc,adv-on-ns = <0>;
|
||||
gpmc,adv-rd-off-ns = <10>;
|
||||
gpmc,adv-wr-off-ns = <10>;
|
||||
gpmc,oe-on-ns = <15>;
|
||||
gpmc,oe-off-ns = <87>;
|
||||
gpmc,we-on-ns = <0>;
|
||||
gpmc,we-off-ns = <87>;
|
||||
gpmc,rd-cycle-ns = <112>;
|
||||
gpmc,wr-cycle-ns = <112>;
|
||||
gpmc,access-ns = <81>;
|
||||
gpmc,page-burst-access-ns = <15>;
|
||||
gpmc,bus-turnaround-ns = <0>;
|
||||
gpmc,cycle2cycle-delay-ns = <0>;
|
||||
gpmc,wait-monitoring-ns = <0>;
|
||||
gpmc,clk-activation-ns = <5>;
|
||||
gpmc,wr-data-mux-bus-ns = <30>;
|
||||
gpmc,wr-access-ns = <81>;
|
||||
gpmc,sync-clk-ps = <15000>;
|
||||
|
||||
/*
|
||||
* MTD partition table corresponding to Nokia's
|
||||
* Maemo 5 (Fremantle) release.
|
||||
*/
|
||||
partition@0 {
|
||||
label = "bootloader";
|
||||
reg = <0x00000000 0x00020000>;
|
||||
read-only;
|
||||
};
|
||||
partition@1 {
|
||||
label = "config";
|
||||
reg = <0x00020000 0x00060000>;
|
||||
};
|
||||
partition@2 {
|
||||
label = "log";
|
||||
reg = <0x00080000 0x00040000>;
|
||||
};
|
||||
partition@3 {
|
||||
label = "kernel";
|
||||
reg = <0x000c0000 0x00200000>;
|
||||
};
|
||||
partition@4 {
|
||||
label = "initfs";
|
||||
reg = <0x002c0000 0x00200000>;
|
||||
};
|
||||
partition@5 {
|
||||
label = "rootfs";
|
||||
reg = <0x004c0000 0x0fb40000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&mcspi1 {
|
||||
/*
|
||||
* For some reason, touchscreen is necessary for screen to work at
|
||||
|
|
@ -81,12 +454,31 @@
|
|||
compatible = "acx565akm";
|
||||
spi-max-frequency = <6000000>;
|
||||
reg = <2>;
|
||||
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&display_pins>;
|
||||
};
|
||||
};
|
||||
|
||||
&usb_otg_hs {
|
||||
interface-type = <0>;
|
||||
usb-phy = <&usb2_phy>;
|
||||
phys = <&usb2_phy>;
|
||||
phy-names = "usb2-phy";
|
||||
mode = <2>;
|
||||
power = <50>;
|
||||
};
|
||||
|
||||
&uart1 {
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
&uart2 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart2_pins>;
|
||||
};
|
||||
|
||||
&uart3 {
|
||||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart3_pins>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -19,6 +19,9 @@
|
|||
interrupt-parent = <&intc>;
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
i2c1 = &i2c2;
|
||||
i2c2 = &i2c3;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
@ -37,6 +40,7 @@
|
|||
|
||||
pmu {
|
||||
compatible = "arm,cortex-a8-pmu";
|
||||
reg = <0x54000000 0x800000>;
|
||||
interrupts = <3>;
|
||||
ti,hwmods = "debugss";
|
||||
};
|
||||
|
|
@ -71,6 +75,8 @@
|
|||
*/
|
||||
ocp {
|
||||
compatible = "simple-bus";
|
||||
reg = <0x68000000 0x10000>;
|
||||
interrupts = <9 10>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
ranges;
|
||||
|
|
@ -193,24 +199,40 @@
|
|||
|
||||
uart1: serial@4806a000 {
|
||||
compatible = "ti,omap3-uart";
|
||||
reg = <0x4806a000 0x2000>;
|
||||
interrupts = <72>;
|
||||
dmas = <&sdma 49 &sdma 50>;
|
||||
dma-names = "tx", "rx";
|
||||
ti,hwmods = "uart1";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart2: serial@4806c000 {
|
||||
compatible = "ti,omap3-uart";
|
||||
reg = <0x4806c000 0x400>;
|
||||
interrupts = <73>;
|
||||
dmas = <&sdma 51 &sdma 52>;
|
||||
dma-names = "tx", "rx";
|
||||
ti,hwmods = "uart2";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
uart3: serial@49020000 {
|
||||
compatible = "ti,omap3-uart";
|
||||
reg = <0x49020000 0x400>;
|
||||
interrupts = <74>;
|
||||
dmas = <&sdma 53 &sdma 54>;
|
||||
dma-names = "tx", "rx";
|
||||
ti,hwmods = "uart3";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
||||
i2c1: i2c@48070000 {
|
||||
compatible = "ti,omap3-i2c";
|
||||
reg = <0x48070000 0x80>;
|
||||
interrupts = <56>;
|
||||
dmas = <&sdma 27 &sdma 28>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c1";
|
||||
|
|
@ -218,6 +240,10 @@
|
|||
|
||||
i2c2: i2c@48072000 {
|
||||
compatible = "ti,omap3-i2c";
|
||||
reg = <0x48072000 0x80>;
|
||||
interrupts = <57>;
|
||||
dmas = <&sdma 29 &sdma 30>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c2";
|
||||
|
|
@ -225,6 +251,10 @@
|
|||
|
||||
i2c3: i2c@48060000 {
|
||||
compatible = "ti,omap3-i2c";
|
||||
reg = <0x48060000 0x80>;
|
||||
interrupts = <61>;
|
||||
dmas = <&sdma 25 &sdma 26>;
|
||||
dma-names = "tx", "rx";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "i2c3";
|
||||
|
|
@ -232,6 +262,8 @@
|
|||
|
||||
mcspi1: spi@48098000 {
|
||||
compatible = "ti,omap2-mcspi";
|
||||
reg = <0x48098000 0x100>;
|
||||
interrupts = <65>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "mcspi1";
|
||||
|
|
@ -250,6 +282,8 @@
|
|||
|
||||
mcspi2: spi@4809a000 {
|
||||
compatible = "ti,omap2-mcspi";
|
||||
reg = <0x4809a000 0x100>;
|
||||
interrupts = <66>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "mcspi2";
|
||||
|
|
@ -263,6 +297,8 @@
|
|||
|
||||
mcspi3: spi@480b8000 {
|
||||
compatible = "ti,omap2-mcspi";
|
||||
reg = <0x480b8000 0x100>;
|
||||
interrupts = <91>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "mcspi3";
|
||||
|
|
@ -276,6 +312,8 @@
|
|||
|
||||
mcspi4: spi@480ba000 {
|
||||
compatible = "ti,omap2-mcspi";
|
||||
reg = <0x480ba000 0x100>;
|
||||
interrupts = <48>;
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
ti,hwmods = "mcspi4";
|
||||
|
|
@ -284,8 +322,17 @@
|
|||
dma-names = "tx0", "rx0";
|
||||
};
|
||||
|
||||
hdqw1w: 1w@480b2000 {
|
||||
compatible = "ti,omap3-1w";
|
||||
reg = <0x480b2000 0x1000>;
|
||||
interrupts = <58>;
|
||||
ti,hwmods = "hdq1w";
|
||||
};
|
||||
|
||||
mmc1: mmc@4809c000 {
|
||||
compatible = "ti,omap3-hsmmc";
|
||||
reg = <0x4809c000 0x200>;
|
||||
interrupts = <83>;
|
||||
ti,hwmods = "mmc1";
|
||||
ti,dual-volt;
|
||||
dmas = <&sdma 61>, <&sdma 62>;
|
||||
|
|
@ -294,6 +341,8 @@
|
|||
|
||||
mmc2: mmc@480b4000 {
|
||||
compatible = "ti,omap3-hsmmc";
|
||||
reg = <0x480b4000 0x200>;
|
||||
interrupts = <86>;
|
||||
ti,hwmods = "mmc2";
|
||||
dmas = <&sdma 47>, <&sdma 48>;
|
||||
dma-names = "tx", "rx";
|
||||
|
|
@ -301,6 +350,8 @@
|
|||
|
||||
mmc3: mmc@480ad000 {
|
||||
compatible = "ti,omap3-hsmmc";
|
||||
reg = <0x480ad000 0x200>;
|
||||
interrupts = <94>;
|
||||
ti,hwmods = "mmc3";
|
||||
dmas = <&sdma 77>, <&sdma 78>;
|
||||
dma-names = "tx", "rx";
|
||||
|
|
@ -308,6 +359,7 @@
|
|||
|
||||
wdt2: wdt@48314000 {
|
||||
compatible = "ti,omap3-wdt";
|
||||
reg = <0x48314000 0x80>;
|
||||
ti,hwmods = "wd_timer2";
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -31,6 +31,10 @@
|
|||
ocp {
|
||||
uart4: serial@49042000 {
|
||||
compatible = "ti,omap3-uart";
|
||||
reg = <0x49042000 0x400>;
|
||||
interrupts = <80>;
|
||||
dmas = <&sdma 81 &sdma 82>;
|
||||
dma-names = "tx", "rx";
|
||||
ti,hwmods = "uart4";
|
||||
clock-frequency = <48000000>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -62,3 +62,7 @@
|
|||
gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
|
||||
};
|
||||
};
|
||||
|
||||
&gpio1 {
|
||||
ti,no-reset-on-init;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -17,6 +17,10 @@
|
|||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
i2c1 = &i2c2;
|
||||
i2c2 = &i2c3;
|
||||
i2c3 = &i2c4;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
@ -218,6 +222,7 @@
|
|||
gpmc,num-cs = <8>;
|
||||
gpmc,num-waitpins = <4>;
|
||||
ti,hwmods = "gpmc";
|
||||
ti,no-idle-on-init;
|
||||
};
|
||||
|
||||
uart1: serial@4806a000 {
|
||||
|
|
@ -496,6 +501,7 @@
|
|||
reg = <0x4c000000 0x100>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "emif1";
|
||||
ti,no-idle-on-init;
|
||||
phy-type = <1>;
|
||||
hw-caps-read-idle-ctrl;
|
||||
hw-caps-ll-interface;
|
||||
|
|
@ -507,6 +513,7 @@
|
|||
reg = <0x4d000000 0x100>;
|
||||
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
|
||||
ti,hwmods = "emif2";
|
||||
ti,no-idle-on-init;
|
||||
phy-type = <1>;
|
||||
hw-caps-read-idle-ctrl;
|
||||
hw-caps-ll-interface;
|
||||
|
|
|
|||
|
|
@ -62,7 +62,6 @@
|
|||
pinctrl-0 = <
|
||||
&twl6040_pins
|
||||
&mcpdm_pins
|
||||
&dmic_pins
|
||||
&mcbsp1_pins
|
||||
&mcbsp2_pins
|
||||
&usbhost_pins
|
||||
|
|
@ -71,7 +70,7 @@
|
|||
|
||||
twl6040_pins: pinmux_twl6040_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x18a (PIN_OUTPUT | MUX_MODE6) /* perslimbus2_clock.gpio5_145 */
|
||||
0x17e (PIN_OUTPUT | MUX_MODE6) /* mcspi1_somi.gpio5_141 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -85,15 +84,6 @@
|
|||
>;
|
||||
};
|
||||
|
||||
dmic_pins: pinmux_dmic_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x144 (PIN_INPUT | MUX_MODE0) /* abedmic_din1.abedmic_din1 */
|
||||
0x146 (PIN_INPUT | MUX_MODE0) /* abedmic_din2.abedmic_din2 */
|
||||
0x148 (PIN_INPUT | MUX_MODE0) /* abedmic_din3.abedmic_din3 */
|
||||
0x14a (PIN_OUTPUT | MUX_MODE0) /* abedmic_clk1.abedmic_clk1 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcbsp1_pins: pinmux_mcbsp1_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x14c (PIN_INPUT | MUX_MODE1) /* abedmic_clk2.abemcbsp1_fsx */
|
||||
|
|
@ -131,25 +121,25 @@
|
|||
0xbc (PIN_INPUT | MUX_MODE0) /* mcspi2_clk */
|
||||
0xbe (PIN_INPUT | MUX_MODE0) /* mcspi2_simo */
|
||||
0xc0 (PIN_INPUT_PULLUP | MUX_MODE0) /* mcspi2_somi */
|
||||
0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs */
|
||||
0xc2 (PIN_OUTPUT | MUX_MODE0) /* mcspi2_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi3_pins: pinmux_mcspi3_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
|
||||
0x7a (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
|
||||
0x7e (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
|
||||
0x78 (PIN_INPUT | MUX_MODE1) /* mcspi3_somi */
|
||||
0x7a (PIN_INPUT | MUX_MODE1) /* mcspi3_cs0 */
|
||||
0x7c (PIN_INPUT | MUX_MODE1) /* mcspi3_simo */
|
||||
0x7e (PIN_INPUT | MUX_MODE1) /* mcspi3_clk */
|
||||
>;
|
||||
};
|
||||
|
||||
mcspi4_pins: pinmux_mcspi4_pins {
|
||||
pinctrl-single,pins = <
|
||||
0x164 (PIN_INPUT | MUX_MODE1) /* mcspi2_clk */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* mcspi2_simo */
|
||||
0x16a (PIN_INPUT | MUX_MODE1) /* mcspi2_somi */
|
||||
0x16c (PIN_INPUT | MUX_MODE1) /* mcspi2_cs */
|
||||
0x164 (PIN_INPUT | MUX_MODE1) /* mcspi4_clk */
|
||||
0x168 (PIN_INPUT | MUX_MODE1) /* mcspi4_simo */
|
||||
0x16a (PIN_INPUT | MUX_MODE1) /* mcspi4_somi */
|
||||
0x16c (PIN_INPUT | MUX_MODE1) /* mcspi4_cs0 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
@ -334,8 +324,6 @@
|
|||
regulator-name = "smps10_out1";
|
||||
regulator-min-microvolt = <5000000>;
|
||||
regulator-max-microvolt = <5000000>;
|
||||
regulator-always-on;
|
||||
regulator-boot-on;
|
||||
};
|
||||
|
||||
ldo1_reg: ldo1 {
|
||||
|
|
@ -503,3 +491,7 @@
|
|||
pinctrl-names = "default";
|
||||
pinctrl-0 = <&uart5_pins>;
|
||||
};
|
||||
|
||||
&cpu0 {
|
||||
cpu0-supply = <&smps123_reg>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -21,6 +21,11 @@
|
|||
interrupt-parent = <&gic>;
|
||||
|
||||
aliases {
|
||||
i2c0 = &i2c1;
|
||||
i2c1 = &i2c2;
|
||||
i2c2 = &i2c3;
|
||||
i2c3 = &i2c4;
|
||||
i2c4 = &i2c5;
|
||||
serial0 = &uart1;
|
||||
serial1 = &uart2;
|
||||
serial2 = &uart3;
|
||||
|
|
@ -33,10 +38,17 @@
|
|||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
cpu@0 {
|
||||
cpu0: cpu@0 {
|
||||
device_type = "cpu";
|
||||
compatible = "arm,cortex-a15";
|
||||
reg = <0x0>;
|
||||
|
||||
operating-points = <
|
||||
/* kHz uV */
|
||||
500000 880000
|
||||
1000000 1060000
|
||||
1500000 1250000
|
||||
>;
|
||||
};
|
||||
cpu@1 {
|
||||
device_type = "cpu";
|
||||
|
|
@ -52,7 +64,6 @@
|
|||
<GIC_PPI 14 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 11 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>,
|
||||
<GIC_PPI 10 (GIC_CPU_MASK_RAW(3) | IRQ_TYPE_LEVEL_LOW)>;
|
||||
clock-frequency = <6144000>;
|
||||
};
|
||||
|
||||
gic: interrupt-controller@48211000 {
|
||||
|
|
@ -607,6 +618,7 @@
|
|||
emif1: emif@4c000000 {
|
||||
compatible = "ti,emif-4d5";
|
||||
ti,hwmods = "emif1";
|
||||
ti,no-idle-on-init;
|
||||
phy-type = <2>; /* DDR PHY type: Intelli PHY */
|
||||
reg = <0x4c000000 0x400>;
|
||||
interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -618,6 +630,7 @@
|
|||
emif2: emif@4d000000 {
|
||||
compatible = "ti,emif-4d5";
|
||||
ti,hwmods = "emif2";
|
||||
ti,no-idle-on-init;
|
||||
phy-type = <2>; /* DDR PHY type: Intelli PHY */
|
||||
reg = <0x4d000000 0x400>;
|
||||
interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
|
||||
|
|
@ -648,6 +661,7 @@
|
|||
reg = <0x4a030000 0x10000>;
|
||||
interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
|
||||
usb-phy = <&usb2_phy>, <&usb3_phy>;
|
||||
dr_mode = "peripheral";
|
||||
tx-fifo-resize;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -23,6 +23,22 @@
|
|||
compatible = "ti,twl4030-wdt";
|
||||
};
|
||||
|
||||
vaux1: regulator-vaux1 {
|
||||
compatible = "ti,twl4030-vaux1";
|
||||
};
|
||||
|
||||
vaux2: regulator-vaux2 {
|
||||
compatible = "ti,twl4030-vaux2";
|
||||
};
|
||||
|
||||
vaux3: regulator-vaux3 {
|
||||
compatible = "ti,twl4030-vaux3";
|
||||
};
|
||||
|
||||
vaux4: regulator-vaux4 {
|
||||
compatible = "ti,twl4030-vaux4";
|
||||
};
|
||||
|
||||
vcc: regulator-vdd1 {
|
||||
compatible = "ti,twl4030-vdd1";
|
||||
regulator-min-microvolt = <600000>;
|
||||
|
|
@ -35,10 +51,20 @@
|
|||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vpll2: regulator-vpll2 {
|
||||
compatible = "ti,twl4030-vpll2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
vio: regulator-vio {
|
||||
compatible = "ti,twl4030-vio";
|
||||
};
|
||||
|
||||
vintana1: regulator-vintana1 {
|
||||
compatible = "ti,twl4030-vintana1";
|
||||
};
|
||||
|
||||
vintana2: regulator-vintana2 {
|
||||
compatible = "ti,twl4030-vintana2";
|
||||
};
|
||||
|
||||
vintdig: regulator-vintdig {
|
||||
compatible = "ti,twl4030-vintdig";
|
||||
};
|
||||
|
||||
vmmc1: regulator-vmmc1 {
|
||||
|
|
@ -65,6 +91,16 @@
|
|||
compatible = "ti,twl4030-vusb3v1";
|
||||
};
|
||||
|
||||
vpll1: regulator-vpll1 {
|
||||
compatible = "ti,twl4030-vpll1";
|
||||
};
|
||||
|
||||
vpll2: regulator-vpll2 {
|
||||
compatible = "ti,twl4030-vpll2";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
regulator-max-microvolt = <1800000>;
|
||||
};
|
||||
|
||||
vsim: regulator-vsim {
|
||||
compatible = "ti,twl4030-vsim";
|
||||
regulator-min-microvolt = <1800000>;
|
||||
|
|
@ -97,4 +133,9 @@
|
|||
compatible = "ti,twl4030-pwmled";
|
||||
#pwm-cells = <2>;
|
||||
};
|
||||
|
||||
twl_pwrbutton: pwrbutton {
|
||||
compatible = "ti,twl4030-pwrbutton";
|
||||
interrupts = <8>;
|
||||
};
|
||||
};
|
||||
|
|
|
|||
|
|
@ -0,0 +1,31 @@
|
|||
/*
|
||||
* This header provides constants specific to AM43XX pinctrl bindings.
|
||||
*/
|
||||
|
||||
#ifndef _DT_BINDINGS_PINCTRL_AM43XX_H
|
||||
#define _DT_BINDINGS_PINCTRL_AM43XX_H
|
||||
|
||||
#define MUX_MODE0 0
|
||||
#define MUX_MODE1 1
|
||||
#define MUX_MODE2 2
|
||||
#define MUX_MODE3 3
|
||||
#define MUX_MODE4 4
|
||||
#define MUX_MODE5 5
|
||||
#define MUX_MODE6 6
|
||||
#define MUX_MODE7 7
|
||||
|
||||
#define PULL_DISABLE (1 << 16)
|
||||
#define PULL_UP (1 << 17)
|
||||
#define INPUT_EN (1 << 18)
|
||||
#define SLEWCTRL_FAST (1 << 19)
|
||||
#define DS0_PULL_UP_DOWN_EN (1 << 27)
|
||||
|
||||
#define PIN_OUTPUT (PULL_DISABLE)
|
||||
#define PIN_OUTPUT_PULLUP (PULL_UP)
|
||||
#define PIN_OUTPUT_PULLDOWN 0
|
||||
#define PIN_INPUT (INPUT_EN | PULL_DISABLE)
|
||||
#define PIN_INPUT_PULLUP (INPUT_EN | PULL_UP)
|
||||
#define PIN_INPUT_PULLDOWN (INPUT_EN)
|
||||
|
||||
#endif
|
||||
|
||||
Loading…
Reference in New Issue