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drm/amdgpu: cleanup SPM support a bit 

This should probably not access job->vm and also emit the SPM switch
under the conditional execute.

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Christian König 2022-11-25 16:42:45 +01:00 committed by Alex Deucher
parent 56b0989e29
commit 5f3c40e9e2
3 changed files with 7 additions and 4 deletions
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1
drivers/gpu/drm/amd/amdgpu/amdgpu_ids.c
View File

@ -315,6 +315,7 @@ static int amdgpu_vmid_grab_reserved(struct amdgpu_vm *vm,
return r; return r;
job->vm_needs_flush = needs_flush; job->vm_needs_flush = needs_flush;
job->spm_update_needed = true;
return 0; return 0;
} }

1
drivers/gpu/drm/amd/amdgpu/amdgpu_job.h
View File

@ -54,6 +54,7 @@ struct amdgpu_job {
uint32_t preemption_status; uint32_t preemption_status;
bool vm_needs_flush; bool vm_needs_flush;
bool gds_switch_needed; bool gds_switch_needed;
bool spm_update_needed;
uint64_t vm_pd_addr; uint64_t vm_pd_addr;
unsigned vmid; unsigned vmid;
unsigned pasid; unsigned pasid;

9
drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c
View File

@ -519,22 +519,20 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
unsigned vmhub = ring->funcs->vmhub; unsigned vmhub = ring->funcs->vmhub;
struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub];
struct amdgpu_vmid *id = &id_mgr->ids[job->vmid]; struct amdgpu_vmid *id = &id_mgr->ids[job->vmid];
bool spm_update_needed = job->spm_update_needed;
bool gds_switch_needed = ring->funcs->emit_gds_switch && bool gds_switch_needed = ring->funcs->emit_gds_switch &&
job->gds_switch_needed; job->gds_switch_needed;
bool vm_flush_needed = job->vm_needs_flush; bool vm_flush_needed = job->vm_needs_flush;
struct dma_fence *fence = NULL; struct dma_fence *fence = NULL;
bool pasid_mapping_needed = false; bool pasid_mapping_needed = false;
unsigned patch_offset = 0; unsigned patch_offset = 0;
bool update_spm_vmid_needed = (job->vm && (job->vm->reserved_vmid[vmhub] != NULL));
int r; int r;
if (update_spm_vmid_needed && adev->gfx.rlc.funcs->update_spm_vmid)
adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid);
if (amdgpu_vmid_had_gpu_reset(adev, id)) { if (amdgpu_vmid_had_gpu_reset(adev, id)) {
gds_switch_needed = true; gds_switch_needed = true;
vm_flush_needed = true; vm_flush_needed = true;
pasid_mapping_needed = true; pasid_mapping_needed = true;
spm_update_needed = true;
} }
mutex_lock(&id_mgr->lock); mutex_lock(&id_mgr->lock);
@ -567,6 +565,9 @@ int amdgpu_vm_flush(struct amdgpu_ring *ring, struct amdgpu_job *job,
if (pasid_mapping_needed) if (pasid_mapping_needed)
amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid); amdgpu_gmc_emit_pasid_mapping(ring, job->vmid, job->pasid);
if (spm_update_needed && adev->gfx.rlc.funcs->update_spm_vmid)
adev->gfx.rlc.funcs->update_spm_vmid(adev, job->vmid);
if (!ring->is_mes_queue && ring->funcs->emit_gds_switch && if (!ring->is_mes_queue && ring->funcs->emit_gds_switch &&
gds_switch_needed) { gds_switch_needed) {
amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base, amdgpu_ring_emit_gds_switch(ring, job->vmid, job->gds_base,