ath10k: assign proper firmware crash dump structure
ar->target_version is same for QCA99x0, QCA4019, QCA9888 and QCA9984, this ended up in assigning the wrong hw_mem_layouts. This patch adds additional hw_rev check to assign correct hw_mem_layouts. Tested on: QCA4019 firmware 10.4-3.2.1.1-00017 QCA9984 firmware 10.4-3.5.3-00057 Signed-off-by: Anilkumar Kolli <akolli@codeaurora.org> Signed-off-by: Kalle Valo <kvalo@codeaurora.org>
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@ -965,6 +965,7 @@ static const struct ath10k_mem_region qca4019_hw10_mem_regions[] = {
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static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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{
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.hw_id = QCA6174_HW_1_0_VERSION,
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.hw_rev = ATH10K_HW_QCA6174,
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.region_table = {
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.regions = qca6174_hw10_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
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@ -972,6 +973,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA6174_HW_1_1_VERSION,
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.hw_rev = ATH10K_HW_QCA6174,
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.region_table = {
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.regions = qca6174_hw10_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
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@ -979,6 +981,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA6174_HW_1_3_VERSION,
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.hw_rev = ATH10K_HW_QCA6174,
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.region_table = {
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.regions = qca6174_hw10_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw10_mem_regions),
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@ -986,6 +989,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA6174_HW_2_1_VERSION,
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.hw_rev = ATH10K_HW_QCA6174,
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.region_table = {
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.regions = qca6174_hw21_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw21_mem_regions),
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@ -993,6 +997,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA6174_HW_3_0_VERSION,
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.hw_rev = ATH10K_HW_QCA6174,
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.region_table = {
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.regions = qca6174_hw30_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
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@ -1000,6 +1005,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA6174_HW_3_2_VERSION,
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.hw_rev = ATH10K_HW_QCA6174,
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.region_table = {
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.regions = qca6174_hw30_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
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@ -1007,6 +1013,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA9377_HW_1_1_DEV_VERSION,
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.hw_rev = ATH10K_HW_QCA9377,
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.region_table = {
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.regions = qca6174_hw30_mem_regions,
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.size = ARRAY_SIZE(qca6174_hw30_mem_regions),
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@ -1014,6 +1021,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA988X_HW_2_0_VERSION,
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.hw_rev = ATH10K_HW_QCA988X,
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.region_table = {
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.regions = qca988x_hw20_mem_regions,
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.size = ARRAY_SIZE(qca988x_hw20_mem_regions),
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@ -1021,6 +1029,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA9984_HW_1_0_DEV_VERSION,
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.hw_rev = ATH10K_HW_QCA9984,
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.region_table = {
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.regions = qca9984_hw10_mem_regions,
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.size = ARRAY_SIZE(qca9984_hw10_mem_regions),
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@ -1028,6 +1037,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA9888_HW_2_0_DEV_VERSION,
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.hw_rev = ATH10K_HW_QCA9888,
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.region_table = {
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.regions = qca9984_hw10_mem_regions,
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.size = ARRAY_SIZE(qca9984_hw10_mem_regions),
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@ -1035,6 +1045,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA99X0_HW_2_0_DEV_VERSION,
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.hw_rev = ATH10K_HW_QCA99X0,
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.region_table = {
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.regions = qca99x0_hw20_mem_regions,
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.size = ARRAY_SIZE(qca99x0_hw20_mem_regions),
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@ -1042,6 +1053,7 @@ static const struct ath10k_hw_mem_layout hw_mem_layouts[] = {
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},
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{
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.hw_id = QCA4019_HW_1_0_DEV_VERSION,
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.hw_rev = ATH10K_HW_QCA4019,
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.region_table = {
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.regions = qca4019_hw10_mem_regions,
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.size = ARRAY_SIZE(qca4019_hw10_mem_regions),
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@ -1088,7 +1100,8 @@ const struct ath10k_hw_mem_layout *ath10k_coredump_get_mem_layout(struct ath10k
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return NULL;
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for (i = 0; i < ARRAY_SIZE(hw_mem_layouts); i++) {
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if (ar->target_version == hw_mem_layouts[i].hw_id)
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if (ar->target_version == hw_mem_layouts[i].hw_id &&
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ar->hw_rev == hw_mem_layouts[i].hw_rev)
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return &hw_mem_layouts[i];
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}
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@ -165,6 +165,7 @@ struct ath10k_mem_region {
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*/
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struct ath10k_hw_mem_layout {
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u32 hw_id;
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u32 hw_rev;
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struct {
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const struct ath10k_mem_region *regions;
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