drm/i915: Use cmpxchg64 for 32b compatilibity
By using the double wide cmpxchg64 on 32bit, we can use the same algorithm on both 32/64b systems. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Matthew Auld <matthew.auld@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20201211110310.22740-1-chris@chris-wilson.co.uk
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@ -159,8 +159,7 @@ __active_retire(struct i915_active *ref)
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GEM_BUG_ON(ref->tree.rb_node != &ref->cache->node);
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/* Make the cached node available for reuse with any timeline */
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if (IS_ENABLED(CONFIG_64BIT))
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ref->cache->timeline = 0; /* needs cmpxchg(u64) */
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ref->cache->timeline = 0; /* needs cmpxchg(u64) */
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}
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spin_unlock_irqrestore(&ref->tree_lock, flags);
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@ -256,7 +255,6 @@ static struct active_node *__active_lookup(struct i915_active *ref, u64 idx)
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if (cached == idx)
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return it;
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#ifdef CONFIG_64BIT /* for cmpxchg(u64) */
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/*
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* An unclaimed cache [.timeline=0] can only be claimed once.
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*
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@ -267,9 +265,8 @@ static struct active_node *__active_lookup(struct i915_active *ref, u64 idx)
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* only the winner of that race will cmpxchg return the old
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* value of 0).
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*/
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if (!cached && !cmpxchg(&it->timeline, 0, idx))
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if (!cached && !cmpxchg64(&it->timeline, 0, idx))
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return it;
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#endif
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}
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BUILD_BUG_ON(offsetof(typeof(*it), node));
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